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LoongArch: Add ARCH_HAS_PTE_DEVMAP support
In order for things like get_user_pages() to work on ZONE_DEVICE memory, we need a software PTE bit to identify device-backed PFNs. Hook this up along with the relevant helpers to join in with ARCH_HAS_PTE_DEVMAP. Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
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@ -22,6 +22,7 @@ config LOONGARCH
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select ARCH_HAS_KERNEL_FPU_SUPPORT if CPU_HAS_FPU
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select ARCH_HAS_NMI_SAFE_THIS_CPU_OPS
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select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE
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select ARCH_HAS_PTE_DEVMAP
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select ARCH_HAS_PTE_SPECIAL
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select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
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select ARCH_INLINE_READ_LOCK if !PREEMPTION
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@ -22,6 +22,7 @@
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#define _PAGE_PFN_SHIFT 12
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#define _PAGE_SWP_EXCLUSIVE_SHIFT 23
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#define _PAGE_PFN_END_SHIFT 48
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#define _PAGE_DEVMAP_SHIFT 59
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#define _PAGE_PRESENT_INVALID_SHIFT 60
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#define _PAGE_NO_READ_SHIFT 61
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#define _PAGE_NO_EXEC_SHIFT 62
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@ -35,6 +36,7 @@
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#define _PAGE_MODIFIED (_ULCAST_(1) << _PAGE_MODIFIED_SHIFT)
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#define _PAGE_PROTNONE (_ULCAST_(1) << _PAGE_PROTNONE_SHIFT)
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#define _PAGE_SPECIAL (_ULCAST_(1) << _PAGE_SPECIAL_SHIFT)
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#define _PAGE_DEVMAP (_ULCAST_(1) << _PAGE_DEVMAP_SHIFT)
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/* We borrow bit 23 to store the exclusive marker in swap PTEs. */
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#define _PAGE_SWP_EXCLUSIVE (_ULCAST_(1) << _PAGE_SWP_EXCLUSIVE_SHIFT)
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@ -74,8 +76,8 @@
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#define __READABLE (_PAGE_VALID)
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#define __WRITEABLE (_PAGE_DIRTY | _PAGE_WRITE)
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#define _PAGE_CHG_MASK (_PAGE_MODIFIED | _PAGE_SPECIAL | _PFN_MASK | _CACHE_MASK | _PAGE_PLV)
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#define _HPAGE_CHG_MASK (_PAGE_MODIFIED | _PAGE_SPECIAL | _PFN_MASK | _CACHE_MASK | _PAGE_PLV | _PAGE_HUGE)
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#define _PAGE_CHG_MASK (_PAGE_MODIFIED | _PAGE_SPECIAL | _PAGE_DEVMAP | _PFN_MASK | _CACHE_MASK | _PAGE_PLV)
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#define _HPAGE_CHG_MASK (_PAGE_MODIFIED | _PAGE_SPECIAL | _PAGE_DEVMAP | _PFN_MASK | _CACHE_MASK | _PAGE_PLV | _PAGE_HUGE)
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#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_NO_READ | \
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_PAGE_USER | _CACHE_CC)
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@ -424,6 +424,9 @@ static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL;
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static inline pte_t pte_mkspecial(pte_t pte) { pte_val(pte) |= _PAGE_SPECIAL; return pte; }
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#endif /* CONFIG_ARCH_HAS_PTE_SPECIAL */
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static inline int pte_devmap(pte_t pte) { return !!(pte_val(pte) & _PAGE_DEVMAP); }
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static inline pte_t pte_mkdevmap(pte_t pte) { pte_val(pte) |= _PAGE_DEVMAP; return pte; }
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#define pte_accessible pte_accessible
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static inline unsigned long pte_accessible(struct mm_struct *mm, pte_t a)
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{
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@ -558,6 +561,17 @@ static inline pmd_t pmd_mkyoung(pmd_t pmd)
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return pmd;
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}
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static inline int pmd_devmap(pmd_t pmd)
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{
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return !!(pmd_val(pmd) & _PAGE_DEVMAP);
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}
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static inline pmd_t pmd_mkdevmap(pmd_t pmd)
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{
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pmd_val(pmd) |= _PAGE_DEVMAP;
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return pmd;
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}
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static inline struct page *pmd_page(pmd_t pmd)
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{
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if (pmd_trans_huge(pmd))
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@ -613,6 +627,11 @@ static inline long pmd_protnone(pmd_t pmd)
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#define pmd_leaf(pmd) ((pmd_val(pmd) & _PAGE_HUGE) != 0)
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#define pud_leaf(pud) ((pud_val(pud) & _PAGE_HUGE) != 0)
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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#define pud_devmap(pud) (0)
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#define pgd_devmap(pgd) (0)
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#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
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/*
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* We provide our own get_unmapped area to cope with the virtual aliasing
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* constraints placed on us by the cache architecture.
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