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perf_counter, x86: speed up the scheduling fast-path
We have to set up the LVT entry only at counter init time, not at every switch-in time. There's friction between NMI and non-NMI use here - we'll probably remove the per counter configurability of it - but until then, dont slow down things ... [ Impact: micro-optimization ] Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Srivatsa Vaddagiri <vatsa@in.ibm.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Corey Ashford <cjashfor@linux.vnet.ibm.com> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Marcelo Tosatti <mtosatti@redhat.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -285,6 +285,7 @@ static int __hw_perf_counter_init(struct perf_counter *counter)
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return -EACCES;
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hwc->nmi = 1;
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}
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perf_counters_lapic_init(hwc->nmi);
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if (!hwc->irq_period)
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hwc->irq_period = x86_pmu.max_period;
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@ -603,8 +604,6 @@ try_generic:
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hwc->counter_base = x86_pmu.perfctr;
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}
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perf_counters_lapic_init(hwc->nmi);
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x86_pmu.disable(hwc, idx);
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cpuc->counters[idx] = counter;
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@ -1054,7 +1053,7 @@ void __init init_hw_perf_counters(void)
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pr_info("... counter mask: %016Lx\n", perf_counter_mask);
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perf_counters_lapic_init(0);
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perf_counters_lapic_init(1);
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register_die_notifier(&perf_counter_nmi_notifier);
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}
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