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scsi: aacraid: Insure we don't access PCIe space during AER/EEH
There are a few windows during AER/EEH when we can access PCIe I/O mapped registers. This will harden the access to insure we do not allow PCIe access during errors Signed-off-by: Dave Carroll <david.carroll@microsemi.com> Reviewed-by: Sagar Biradar <sagar.biradar@microchip.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -2640,9 +2640,14 @@ static inline unsigned int cap_to_cyls(sector_t capacity, unsigned divisor)
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return capacity;
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}
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static inline int aac_pci_offline(struct aac_dev *dev)
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{
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return pci_channel_offline(dev->pdev) || dev->handle_pci_error;
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}
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static inline int aac_adapter_check_health(struct aac_dev *dev)
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{
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if (unlikely(pci_channel_offline(dev->pdev)))
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if (unlikely(aac_pci_offline(dev)))
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return -1;
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return (dev)->a_ops.adapter_check_health(dev);
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@ -672,7 +672,7 @@ int aac_fib_send(u16 command, struct fib *fibptr, unsigned long size,
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return -ETIMEDOUT;
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}
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if (unlikely(pci_channel_offline(dev->pdev)))
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if (unlikely(aac_pci_offline(dev)))
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return -EFAULT;
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if ((blink = aac_adapter_check_health(dev)) > 0) {
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@ -772,7 +772,7 @@ int aac_hba_send(u8 command, struct fib *fibptr, fib_callback callback,
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spin_unlock_irqrestore(&fibptr->event_lock, flags);
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if (unlikely(pci_channel_offline(dev->pdev)))
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if (unlikely(aac_pci_offline(dev)))
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return -EFAULT;
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fibptr->flags |= FIB_CONTEXT_FLAG_WAIT;
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