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gpio: Cleanup genirq namespace
Converted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Grant Likely <grant.likely@secretlab.ca> LKML-Reference: <20110324212509.025730689@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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b51804bcf0
@ -289,10 +289,10 @@ static int adp5588_irq_setup(struct adp5588_gpio *dev)
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for (gpio = 0; gpio < dev->gpio_chip.ngpio; gpio++) {
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int irq = gpio + dev->irq_base;
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set_irq_chip_data(irq, dev);
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set_irq_chip_and_handler(irq, &adp5588_irq_chip,
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irq_set_chip_data(irq, dev);
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irq_set_chip_and_handler(irq, &adp5588_irq_chip,
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handle_level_irq);
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set_irq_nested_thread(irq, 1);
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irq_set_nested_thread(irq, 1);
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#ifdef CONFIG_ARM
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/*
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* ARM needs us to explicitly flag the IRQ as VALID,
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@ -300,7 +300,7 @@ static int adp5588_irq_setup(struct adp5588_gpio *dev)
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*/
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set_irq_flags(irq, IRQF_VALID);
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#else
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set_irq_noprobe(irq);
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irq_set_noprobe(irq);
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#endif
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}
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@ -470,14 +470,14 @@ static int max732x_irq_setup(struct max732x_chip *chip,
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if (!(chip->dir_input & (1 << lvl)))
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continue;
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set_irq_chip_data(irq, chip);
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set_irq_chip_and_handler(irq, &max732x_irq_chip,
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irq_set_chip_data(irq, chip);
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irq_set_chip_and_handler(irq, &max732x_irq_chip,
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handle_edge_irq);
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set_irq_nested_thread(irq, 1);
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irq_set_nested_thread(irq, 1);
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#ifdef CONFIG_ARM
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set_irq_flags(irq, IRQF_VALID);
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#else
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set_irq_noprobe(irq);
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irq_set_noprobe(irq);
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#endif
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}
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@ -395,13 +395,13 @@ static int pca953x_irq_setup(struct pca953x_chip *chip,
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for (lvl = 0; lvl < chip->gpio_chip.ngpio; lvl++) {
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int irq = lvl + chip->irq_base;
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set_irq_chip_data(irq, chip);
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set_irq_chip_and_handler(irq, &pca953x_irq_chip,
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irq_set_chip_data(irq, chip);
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irq_set_chip_and_handler(irq, &pca953x_irq_chip,
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handle_edge_irq);
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#ifdef CONFIG_ARM
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set_irq_flags(irq, IRQF_VALID);
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#else
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set_irq_noprobe(irq);
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irq_set_noprobe(irq);
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#endif
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}
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@ -210,7 +210,7 @@ static struct irq_chip pl061_irqchip = {
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static void pl061_irq_handler(unsigned irq, struct irq_desc *desc)
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{
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struct list_head *chip_list = get_irq_data(irq);
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struct list_head *chip_list = irq_get_handler_data(irq);
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struct list_head *ptr;
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struct pl061_gpio *chip;
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@ -294,7 +294,7 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id)
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ret = -ENODEV;
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goto iounmap;
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}
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set_irq_chained_handler(irq, pl061_irq_handler);
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irq_set_chained_handler(irq, pl061_irq_handler);
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if (!test_and_set_bit(irq, init_irq)) { /* list initialized? */
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chip_list = kmalloc(sizeof(*chip_list), GFP_KERNEL);
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if (chip_list == NULL) {
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@ -303,9 +303,9 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id)
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goto iounmap;
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}
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INIT_LIST_HEAD(chip_list);
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set_irq_data(irq, chip_list);
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irq_set_handler_data(irq, chip_list);
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} else
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chip_list = get_irq_data(irq);
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chip_list = irq_get_handler_data(irq);
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list_add(&chip->list, chip_list);
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for (i = 0; i < PL061_GPIO_NR; i++) {
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@ -315,10 +315,10 @@ static int pl061_probe(struct amba_device *dev, const struct amba_id *id)
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else
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pl061_direction_input(&chip->gc, i);
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set_irq_chip(i+chip->irq_base, &pl061_irqchip);
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set_irq_handler(i+chip->irq_base, handle_simple_irq);
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irq_set_chip(i + chip->irq_base, &pl061_irqchip);
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irq_set_handler(i + chip->irq_base, handle_simple_irq);
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set_irq_flags(i+chip->irq_base, IRQF_VALID);
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set_irq_chip_data(i+chip->irq_base, chip);
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irq_set_chip_data(i + chip->irq_base, chip);
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}
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return 0;
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@ -254,14 +254,14 @@ static int __devinit stmpe_gpio_irq_init(struct stmpe_gpio *stmpe_gpio)
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int irq;
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for (irq = base; irq < base + stmpe_gpio->chip.ngpio; irq++) {
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set_irq_chip_data(irq, stmpe_gpio);
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set_irq_chip_and_handler(irq, &stmpe_gpio_irq_chip,
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irq_set_chip_data(irq, stmpe_gpio);
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irq_set_chip_and_handler(irq, &stmpe_gpio_irq_chip,
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handle_simple_irq);
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set_irq_nested_thread(irq, 1);
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irq_set_nested_thread(irq, 1);
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#ifdef CONFIG_ARM
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set_irq_flags(irq, IRQF_VALID);
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#else
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set_irq_noprobe(irq);
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irq_set_noprobe(irq);
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#endif
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}
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@ -277,8 +277,8 @@ static void stmpe_gpio_irq_remove(struct stmpe_gpio *stmpe_gpio)
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#ifdef CONFIG_ARM
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set_irq_flags(irq, 0);
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#endif
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set_irq_chip_and_handler(irq, NULL, NULL);
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set_irq_chip_data(irq, NULL);
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irq_set_chip_and_handler(irq, NULL, NULL);
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irq_set_chip_data(irq, NULL);
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}
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}
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@ -551,12 +551,12 @@ static int sx150x_install_irq_chip(struct sx150x_chip *chip,
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for (n = 0; n < chip->dev_cfg->ngpios; ++n) {
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irq = irq_base + n;
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set_irq_chip_and_handler(irq, &chip->irq_chip, handle_edge_irq);
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set_irq_nested_thread(irq, 1);
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irq_set_chip_and_handler(irq, &chip->irq_chip, handle_edge_irq);
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irq_set_nested_thread(irq, 1);
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#ifdef CONFIG_ARM
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set_irq_flags(irq, IRQF_VALID);
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#else
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set_irq_noprobe(irq);
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irq_set_noprobe(irq);
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#endif
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}
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@ -583,8 +583,8 @@ static void sx150x_remove_irq_chip(struct sx150x_chip *chip)
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for (n = 0; n < chip->dev_cfg->ngpios; ++n) {
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irq = chip->irq_base + n;
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set_irq_handler(irq, NULL);
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set_irq_chip(irq, NULL);
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irq_set_handler(irq, NULL);
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irq_set_chip(irq, NULL);
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}
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}
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@ -239,14 +239,14 @@ static int tc3589x_gpio_irq_init(struct tc3589x_gpio *tc3589x_gpio)
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int irq;
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for (irq = base; irq < base + tc3589x_gpio->chip.ngpio; irq++) {
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set_irq_chip_data(irq, tc3589x_gpio);
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set_irq_chip_and_handler(irq, &tc3589x_gpio_irq_chip,
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irq_set_chip_data(irq, tc3589x_gpio);
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irq_set_chip_and_handler(irq, &tc3589x_gpio_irq_chip,
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handle_simple_irq);
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set_irq_nested_thread(irq, 1);
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irq_set_nested_thread(irq, 1);
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#ifdef CONFIG_ARM
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set_irq_flags(irq, IRQF_VALID);
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#else
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set_irq_noprobe(irq);
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irq_set_noprobe(irq);
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#endif
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}
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@ -262,8 +262,8 @@ static void tc3589x_gpio_irq_remove(struct tc3589x_gpio *tc3589x_gpio)
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#ifdef CONFIG_ARM
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set_irq_flags(irq, 0);
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#endif
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set_irq_chip_and_handler(irq, NULL, NULL);
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set_irq_chip_data(irq, NULL);
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irq_set_chip_and_handler(irq, NULL, NULL);
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irq_set_chip_data(irq, NULL);
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}
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}
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@ -195,7 +195,7 @@ out:
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static void timbgpio_irq(unsigned int irq, struct irq_desc *desc)
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{
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struct timbgpio *tgpio = get_irq_data(irq);
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struct timbgpio *tgpio = irq_get_handler_data(irq);
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unsigned long ipr;
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int offset;
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@ -291,16 +291,16 @@ static int __devinit timbgpio_probe(struct platform_device *pdev)
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return 0;
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for (i = 0; i < pdata->nr_pins; i++) {
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set_irq_chip_and_handler_name(tgpio->irq_base + i,
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irq_set_chip_and_handler_name(tgpio->irq_base + i,
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&timbgpio_irqchip, handle_simple_irq, "mux");
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set_irq_chip_data(tgpio->irq_base + i, tgpio);
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irq_set_chip_data(tgpio->irq_base + i, tgpio);
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#ifdef CONFIG_ARM
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set_irq_flags(tgpio->irq_base + i, IRQF_VALID | IRQF_PROBE);
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#endif
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}
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set_irq_data(irq, tgpio);
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set_irq_chained_handler(irq, timbgpio_irq);
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irq_set_handler_data(irq, tgpio);
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irq_set_chained_handler(irq, timbgpio_irq);
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return 0;
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@ -327,12 +327,12 @@ static int __devexit timbgpio_remove(struct platform_device *pdev)
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if (irq >= 0 && tgpio->irq_base > 0) {
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int i;
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for (i = 0; i < pdata->nr_pins; i++) {
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set_irq_chip(tgpio->irq_base + i, NULL);
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set_irq_chip_data(tgpio->irq_base + i, NULL);
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irq_set_chip(tgpio->irq_base + i, NULL);
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irq_set_chip_data(tgpio->irq_base + i, NULL);
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}
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set_irq_handler(irq, NULL);
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set_irq_data(irq, NULL);
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irq_set_handler(irq, NULL);
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irq_set_handler_data(irq, NULL);
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}
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err = gpiochip_remove(&tgpio->gpio);
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@ -238,13 +238,13 @@ void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger,
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break;
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}
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}
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set_irq_chip_and_handler(GIU_IRQ(pin),
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irq_set_chip_and_handler(GIU_IRQ(pin),
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&giuint_low_irq_chip,
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handle_edge_irq);
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} else {
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giu_clear(GIUINTTYPL, mask);
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giu_clear(GIUINTHTSELL, mask);
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set_irq_chip_and_handler(GIU_IRQ(pin),
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irq_set_chip_and_handler(GIU_IRQ(pin),
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&giuint_low_irq_chip,
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handle_level_irq);
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}
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@ -273,13 +273,13 @@ void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger,
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break;
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}
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}
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set_irq_chip_and_handler(GIU_IRQ(pin),
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irq_set_chip_and_handler(GIU_IRQ(pin),
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&giuint_high_irq_chip,
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handle_edge_irq);
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} else {
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giu_clear(GIUINTTYPH, mask);
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giu_clear(GIUINTHTSELH, mask);
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set_irq_chip_and_handler(GIU_IRQ(pin),
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irq_set_chip_and_handler(GIU_IRQ(pin),
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&giuint_high_irq_chip,
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handle_level_irq);
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}
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@ -539,9 +539,9 @@ static int __devinit giu_probe(struct platform_device *pdev)
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chip = &giuint_high_irq_chip;
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if (trigger & (1 << pin))
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set_irq_chip_and_handler(i, chip, handle_edge_irq);
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irq_set_chip_and_handler(i, chip, handle_edge_irq);
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else
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set_irq_chip_and_handler(i, chip, handle_level_irq);
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irq_set_chip_and_handler(i, chip, handle_level_irq);
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}
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