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[PATCH] mv643xx_eth: Receive buffers require 8 byte alignment
The Marvell mv643xx ethernet hardware requires that DMA buffers be aligned to 8-byte boundaries. This patch satisfies this requirement. Buffers allocated by dev_alloc_skb() only have 4-byte alignment when slab debugging is enabled. Also, document that the 2-byte offset to align the IP packets on receive is a hardware feature and is not tied to NET_IP_ALIGN. Signed-off-by: Dale Farnsworth <dale@farnsworth.org> mv643xx_eth.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
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@ -57,7 +57,9 @@
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/* Constants */
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#define VLAN_HLEN 4
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#define FCS_LEN 4
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#define WRAP NET_IP_ALIGN + ETH_HLEN + VLAN_HLEN + FCS_LEN
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#define DMA_ALIGN 8 /* hw requires 8-byte alignment */
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#define HW_IP_ALIGN 2 /* hw aligns IP header */
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#define WRAP HW_IP_ALIGN + ETH_HLEN + VLAN_HLEN + FCS_LEN
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#define RX_SKB_SIZE ((dev->mtu + WRAP + 7) & ~0x7)
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#define INT_CAUSE_UNMASK_ALL 0x0007ffff
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@ -173,15 +175,19 @@ static void mv643xx_eth_rx_task(void *data)
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struct mv643xx_private *mp = netdev_priv(dev);
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struct pkt_info pkt_info;
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struct sk_buff *skb;
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int unaligned;
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if (test_and_set_bit(0, &mp->rx_task_busy))
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panic("%s: Error in test_set_bit / clear_bit", dev->name);
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while (mp->rx_ring_skbs < (mp->rx_ring_size - 5)) {
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skb = dev_alloc_skb(RX_SKB_SIZE);
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skb = dev_alloc_skb(RX_SKB_SIZE + DMA_ALIGN);
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if (!skb)
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break;
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mp->rx_ring_skbs++;
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unaligned = (u32)skb->data & (DMA_ALIGN - 1);
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if (unaligned)
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skb_reserve(skb, DMA_ALIGN - unaligned);
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pkt_info.cmd_sts = ETH_RX_ENABLE_INTERRUPT;
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pkt_info.byte_cnt = RX_SKB_SIZE;
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pkt_info.buf_ptr = dma_map_single(NULL, skb->data, RX_SKB_SIZE,
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@ -192,7 +198,7 @@ static void mv643xx_eth_rx_task(void *data)
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"%s: Error allocating RX Ring\n", dev->name);
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break;
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}
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skb_reserve(skb, 2);
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skb_reserve(skb, HW_IP_ALIGN);
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}
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clear_bit(0, &mp->rx_task_busy);
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/*
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