From d1a0ff5ff9efba55cc39ca520ba076943cd9a425 Mon Sep 17 00:00:00 2001 From: Maxime Chevallier Date: Fri, 25 Nov 2022 14:17:59 +0100 Subject: [PATCH 1/3] net: pcs: altera-tse: use read_poll_timeout to wait for reset Software resets on the TSE PCS don't clear registers, but rather reset all internal state machines regarding AN, comma detection and encoding/decoding. Use read_poll_timeout to wait for the reset to clear instead of manually polling the register. Signed-off-by: Maxime Chevallier Signed-off-by: Jakub Kicinski --- drivers/net/pcs/pcs-altera-tse.c | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/drivers/net/pcs/pcs-altera-tse.c b/drivers/net/pcs/pcs-altera-tse.c index 97a7cabff962..e86cadc391e8 100644 --- a/drivers/net/pcs/pcs-altera-tse.c +++ b/drivers/net/pcs/pcs-altera-tse.c @@ -60,7 +60,6 @@ static void tse_pcs_write(struct altera_tse_pcs *tse_pcs, int regnum, static int tse_pcs_reset(struct altera_tse_pcs *tse_pcs) { - int i = 0; u16 bmcr; /* Reset PCS block */ @@ -68,13 +67,9 @@ static int tse_pcs_reset(struct altera_tse_pcs *tse_pcs) bmcr |= BMCR_RESET; tse_pcs_write(tse_pcs, MII_BMCR, bmcr); - for (i = 0; i < SGMII_PCS_SW_RESET_TIMEOUT; i++) { - if (!(tse_pcs_read(tse_pcs, MII_BMCR) & BMCR_RESET)) - return 0; - udelay(1); - } - - return -ETIMEDOUT; + return read_poll_timeout(tse_pcs_read, bmcr, (bmcr & BMCR_RESET), + 10, SGMII_PCS_SW_RESET_TIMEOUT, 1, + tse_pcs, MII_BMCR); } static int alt_tse_pcs_validate(struct phylink_pcs *pcs, From b4a7bf9f5bb8e6b21d728d00dc3afe9fbee2420c Mon Sep 17 00:00:00 2001 From: Maxime Chevallier Date: Fri, 25 Nov 2022 14:18:00 +0100 Subject: [PATCH 2/3] net: pcs: altera-tse: don't set the speed for 1000BaseX When disabling the SGMII mode bit, the PCS defaults to 1000BaseX mode. In that mode, we don't need to set the speed since it's always 1000Mbps. Signed-off-by: Maxime Chevallier Signed-off-by: Jakub Kicinski --- drivers/net/pcs/pcs-altera-tse.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/net/pcs/pcs-altera-tse.c b/drivers/net/pcs/pcs-altera-tse.c index e86cadc391e8..be65271ff5de 100644 --- a/drivers/net/pcs/pcs-altera-tse.c +++ b/drivers/net/pcs/pcs-altera-tse.c @@ -102,7 +102,6 @@ static int alt_tse_pcs_config(struct phylink_pcs *pcs, unsigned int mode, if_mode |= PCS_IF_MODE_USE_SGMII_AN | PCS_IF_MODE_SGMII_ENA; } else if (interface == PHY_INTERFACE_MODE_1000BASEX) { if_mode &= ~(PCS_IF_MODE_USE_SGMII_AN | PCS_IF_MODE_SGMII_ENA); - if_mode |= PCS_IF_MODE_SGMI_SPEED_1000; } ctrl |= (BMCR_SPEED1000 | BMCR_FULLDPLX | BMCR_ANENABLE); From befd851de29543205246468abe3e7793f26c7e2f Mon Sep 17 00:00:00 2001 From: Maxime Chevallier Date: Fri, 25 Nov 2022 14:18:01 +0100 Subject: [PATCH 3/3] net: pcs: altera-tse: remove unnecessary register definitions remove unused register definitions, left from the split with the altera-tse mac driver. Signed-off-by: Maxime Chevallier Signed-off-by: Jakub Kicinski --- drivers/net/pcs/pcs-altera-tse.c | 9 --------- 1 file changed, 9 deletions(-) diff --git a/drivers/net/pcs/pcs-altera-tse.c b/drivers/net/pcs/pcs-altera-tse.c index be65271ff5de..d616749761f4 100644 --- a/drivers/net/pcs/pcs-altera-tse.c +++ b/drivers/net/pcs/pcs-altera-tse.c @@ -12,22 +12,13 @@ /* SGMII PCS register addresses */ -#define SGMII_PCS_SCRATCH 0x10 -#define SGMII_PCS_REV 0x11 #define SGMII_PCS_LINK_TIMER_0 0x12 -#define SGMII_PCS_LINK_TIMER_REG(x) (0x12 + (x)) #define SGMII_PCS_LINK_TIMER_1 0x13 #define SGMII_PCS_IF_MODE 0x14 #define PCS_IF_MODE_SGMII_ENA BIT(0) #define PCS_IF_MODE_USE_SGMII_AN BIT(1) -#define PCS_IF_MODE_SGMI_SPEED_MASK GENMASK(3, 2) -#define PCS_IF_MODE_SGMI_SPEED_10 (0 << 2) -#define PCS_IF_MODE_SGMI_SPEED_100 (1 << 2) -#define PCS_IF_MODE_SGMI_SPEED_1000 (2 << 2) #define PCS_IF_MODE_SGMI_HALF_DUPLEX BIT(4) #define PCS_IF_MODE_SGMI_PHY_AN BIT(5) -#define SGMII_PCS_DIS_READ_TO 0x15 -#define SGMII_PCS_READ_TO 0x16 #define SGMII_PCS_SW_RESET_TIMEOUT 100 /* usecs */ struct altera_tse_pcs {