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iio: dac: ad5791: Fix alignment for DMA saftey

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____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1.  Switch to the updated
IIO_DMA_MINALIGN definition.

Fixes: 791bb52a0c ("iio:ad5791: Do not store transfer buffers on the stack")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-56-jic23@kernel.org
This commit is contained in:
Jonathan Cameron 2022-05-08 18:56:35 +01:00
parent 27f2261d16
commit b2d5e9de77
1 changed files with 1 additions and 1 deletions
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drivers/iio/dac/ad5791.c
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@ -95,7 +95,7 @@ struct ad5791_state {
union {
__be32 d32;
u8 d8[4];
} data[3] ____cacheline_aligned;
} data[3] __aligned(IIO_DMA_MINALIGN);
};
enum ad5791_supported_device_ids {