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powerpc: re-initialise lazy FPU/VEC counters on every fault

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When a FP/VEC/VSX unavailable fault loads registers and enables the
facility in the MSR, re-set the lazy restore counters to 1 rather
than incrementing them so every fault gets the same number of
restores before the next fault.

This probably shouldn't be a practical change because if a lazy counter
was non-zero then it should have been restored and would not cause a
fault when userspace tries to access it. However the code and comment
implies otherwise so that's misleading and unnecessary.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20200623234139.2262227-3-npiggin@gmail.com
This commit is contained in:
Nicholas Piggin 2020-06-24 09:41:39 +10:00 committed by Michael Ellerman
parent 01eb01877f
commit b2b46304e9
2 changed files with 2 additions and 6 deletions
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4
arch/powerpc/kernel/fpu.S
View File

@ -107,9 +107,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
or r12,r12,r4
std r12,_MSR(r1)
#endif
/* Don't care if r4 overflows, this is desired behaviour */
lbz r4,THREAD_LOAD_FP(r5)
addi r4,r4,1
li r4,1
stb r4,THREAD_LOAD_FP(r5)
addi r10,r5,THREAD_FPSTATE
lfd fr0,FPSTATE_FPSCR(r10)

4
arch/powerpc/kernel/vector.S
View File

@ -76,9 +76,7 @@ _GLOBAL(load_up_altivec)
oris r12,r12,MSR_VEC@h
std r12,_MSR(r1)
#endif
/* Don't care if r4 overflows, this is desired behaviour */
lbz r4,THREAD_LOAD_VEC(r5)
addi r4,r4,1
li r4,1
stb r4,THREAD_LOAD_VEC(r5)
addi r6,r5,THREAD_VRSTATE
li r4,1