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ARM: pxa: use ioremap to access CPLD
The pcm990 baseboard for the pcm027 module used to setup a static mapping for accessing the CPLD. It became illegal to call iotable_init that late. The pcm027 support is broken since then. This patch switches the cpld support to ioremap and removes all references to previous static mappings. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
This commit is contained in:
Sascha Hauer
Haojian Zhuang
parent
66f75a5d02
commit
b298322b75
@ -31,7 +31,6 @@
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#define PCM990_CTRL_INT_IRQ PXA_GPIO_TO_IRQ(PCM990_CTRL_INT_IRQ_GPIO)
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#define PCM990_CTRL_INT_IRQ_EDGE IRQ_TYPE_EDGE_RISING
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#define PCM990_CTRL_PHYS PXA_CS1_PHYS /* 16-Bit */
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#define PCM990_CTRL_BASE 0xea000000
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#define PCM990_CTRL_SIZE (1*1024*1024)
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#define PCM990_CTRL_PWR_IRQ_GPIO 14
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@ -69,13 +68,13 @@
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#define PCM990_CTRL_MMC2DE 0x0004 /* R MMC2 Card detect */
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#define PCM990_CTRL_MMC2WP 0x0008 /* R MMC2 Card write protect */
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#define PCM990_CTRL_REG6 0x000C /* Interrupt Clear REGISTER */
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#define PCM990_CTRL_INTSETCLR 0x000C /* Interrupt Clear REGISTER */
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#define PCM990_CTRL_INTC0 0x0001 /* Clear Reg BT Detect */
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#define PCM990_CTRL_INTC1 0x0002 /* Clear Reg FR RI */
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#define PCM990_CTRL_INTC2 0x0004 /* Clear Reg MMC1 Detect */
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#define PCM990_CTRL_INTC3 0x0008 /* Clear Reg PM_5V off */
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#define PCM990_CTRL_REG7 0x000E /* Interrupt Enable REGISTER */
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#define PCM990_CTRL_INTMSKENA 0x000E /* Interrupt Enable REGISTER */
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#define PCM990_CTRL_ENAINT0 0x0001 /* Enable Int BT Detect */
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#define PCM990_CTRL_ENAINT1 0x0002 /* Enable Int FR RI */
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#define PCM990_CTRL_ENAINT2 0x0004 /* Enable Int MMC1 Detect */
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@ -102,32 +101,6 @@
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#define PCM990_CTRL_ACPRES 0x0004 /* DC Present */
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#define PCM990_CTRL_ACALARM 0x0008 /* Error Akku */
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#define PCM990_CTRL_P2V(x) ((x) - PCM990_CTRL_PHYS + PCM990_CTRL_BASE)
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#define PCM990_CTRL_V2P(x) ((x) - PCM990_CTRL_BASE + PCM990_CTRL_PHYS)
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#ifndef __ASSEMBLY__
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# define __PCM990_CTRL_REG(x) \
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(*((volatile unsigned char *)PCM990_CTRL_P2V(x)))
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#else
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# define __PCM990_CTRL_REG(x) PCM990_CTRL_P2V(x)
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#endif
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#define PCM990_INTMSKENA __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG7)
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#define PCM990_INTSETCLR __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG6)
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#define PCM990_CTRL0 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG0)
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#define PCM990_CTRL1 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG1)
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#define PCM990_CTRL2 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG2)
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#define PCM990_CTRL3 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3)
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#define PCM990_CTRL4 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG4)
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#define PCM990_CTRL5 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5)
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#define PCM990_CTRL6 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG6)
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#define PCM990_CTRL7 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG7)
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#define PCM990_CTRL8 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG8)
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#define PCM990_CTRL9 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG9)
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#define PCM990_CTRL10 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG10)
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#define PCM990_CTRL11 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG11)
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/*
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* IDE
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*/
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@ -166,24 +139,6 @@
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#define PCM990_IDE_PLD_P2V(x) ((x) - PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_BASE)
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#define PCM990_IDE_PLD_V2P(x) ((x) - PCM990_IDE_PLD_BASE + PCM990_IDE_PLD_PHYS)
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#ifndef __ASSEMBLY__
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# define __PCM990_IDE_PLD_REG(x) \
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(*((volatile unsigned char *)PCM990_IDE_PLD_P2V(x)))
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#else
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# define __PCM990_IDE_PLD_REG(x) PCM990_IDE_PLD_P2V(x)
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#endif
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#define PCM990_IDE0 \
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__PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG0)
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#define PCM990_IDE1 \
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__PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG1)
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#define PCM990_IDE2 \
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__PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG2)
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#define PCM990_IDE3 \
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__PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG3)
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#define PCM990_IDE4 \
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__PCM990_IDE_PLD_REG(PCM990_IDE_PLD_PHYS + PCM990_IDE_PLD_REG4)
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/*
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* Compact Flash
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*/
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@ -196,10 +151,6 @@
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#define PCM990_CF_CD_EDGE IRQ_TYPE_EDGE_RISING
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#define PCM990_CF_PLD_PHYS 0x30000000 /* 16 bit wide */
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#define PCM990_CF_PLD_BASE 0xef000000
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#define PCM990_CF_PLD_SIZE (1*1024*1024)
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#define PCM990_CF_PLD_P2V(x) ((x) - PCM990_CF_PLD_PHYS + PCM990_CF_PLD_BASE)
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#define PCM990_CF_PLD_V2P(x) ((x) - PCM990_CF_PLD_BASE + PCM990_CF_PLD_PHYS)
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/* visible CPLD (U6) registers */
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#define PCM990_CF_PLD_REG0 0x1000 /* OFFSET CF REGISTER 0 */
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@ -239,21 +190,6 @@
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#define PCM990_CF_REG6_CD1 0x0001 /* R CF Card_Detect1 */
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#define PCM990_CF_REG6_CD2 0x0002 /* R CF Card_Detect2 */
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#ifndef __ASSEMBLY__
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# define __PCM990_CF_PLD_REG(x) \
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(*((volatile unsigned char *)PCM990_CF_PLD_P2V(x)))
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#else
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# define __PCM990_CF_PLD_REG(x) PCM990_CF_PLD_P2V(x)
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#endif
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#define PCM990_CF0 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG0)
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#define PCM990_CF1 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG1)
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#define PCM990_CF2 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG2)
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#define PCM990_CF3 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG3)
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#define PCM990_CF4 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG4)
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#define PCM990_CF5 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG5)
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#define PCM990_CF6 __PCM990_CF_PLD_REG(PCM990_CF_PLD_PHYS + PCM990_CF_PLD_REG6)
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/*
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* Wolfson AC97 Touch
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*/
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@ -65,6 +65,18 @@ static unsigned long pcm990_pin_config[] __initdata = {
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GPIO31_AC97_SYNC,
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};
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static void __iomem *pcm990_cpld_base;
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static u8 pcm990_cpld_readb(unsigned int reg)
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{
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return readb(pcm990_cpld_base + reg);
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}
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static void pcm990_cpld_writeb(u8 value, unsigned int reg)
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{
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writeb(value, pcm990_cpld_base + reg);
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}
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/*
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* pcm990_lcd_power - control power supply to the LCD
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* @on: 0 = switch off, 1 = switch on
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@ -78,13 +90,13 @@ static void pcm990_lcd_power(int on, struct fb_var_screeninfo *var)
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/* enable LCD-Latches
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* power on LCD
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*/
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__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) =
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PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON;
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pcm990_cpld_writeb(PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON,
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PCM990_CTRL_REG3);
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} else {
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/* disable LCD-Latches
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* power off LCD
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*/
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__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) = 0x00;
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pcm990_cpld_writeb(0, PCM990_CTRL_REG3);
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}
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}
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#endif
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@ -243,15 +255,26 @@ static unsigned long pcm990_irq_enabled;
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static void pcm990_mask_ack_irq(struct irq_data *d)
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{
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int pcm990_irq = (d->irq - PCM027_IRQ(0));
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PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq));
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pcm990_irq_enabled &= ~(1 << pcm990_irq);
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pcm990_cpld_writeb(pcm990_irq_enabled, PCM990_CTRL_INTMSKENA);
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}
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static void pcm990_unmask_irq(struct irq_data *d)
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{
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int pcm990_irq = (d->irq - PCM027_IRQ(0));
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u8 val;
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/* the irq can be acknowledged only if deasserted, so it's done here */
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PCM990_INTSETCLR |= 1 << pcm990_irq;
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PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq));
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pcm990_irq_enabled |= (1 << pcm990_irq);
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val = pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
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val |= 1 << pcm990_irq;
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pcm990_cpld_writeb(val, PCM990_CTRL_INTSETCLR);
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pcm990_cpld_writeb(pcm990_irq_enabled, PCM990_CTRL_INTMSKENA);
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}
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static struct irq_chip pcm990_irq_chip = {
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@ -261,7 +284,10 @@ static struct irq_chip pcm990_irq_chip = {
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static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
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{
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unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
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unsigned long pending;
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pending = ~pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
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pending &= pcm990_irq_enabled;
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do {
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/* clear our parent IRQ */
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@ -270,7 +296,8 @@ static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
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irq = PCM027_IRQ(0) + __ffs(pending);
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generic_handle_irq(irq);
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}
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pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
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pending = ~pcm990_cpld_readb(PCM990_CTRL_INTSETCLR);
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pending &= pcm990_irq_enabled;
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} while (pending);
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}
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@ -285,8 +312,9 @@ static void __init pcm990_init_irq(void)
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set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
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}
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PCM990_INTMSKENA = 0x00; /* disable all Interrupts */
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PCM990_INTSETCLR = 0xFF;
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/* disable all Interrupts */
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pcm990_cpld_writeb(0x0, PCM990_CTRL_INTMSKENA);
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pcm990_cpld_writeb(0xff, PCM990_CTRL_INTSETCLR);
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irq_set_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
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irq_set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
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@ -309,13 +337,16 @@ static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
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static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
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{
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struct pxamci_platform_data *p_d = dev->platform_data;
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u8 val;
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val = pcm990_cpld_readb(PCM990_CTRL_REG5);
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if ((1 << vdd) & p_d->ocr_mask)
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__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
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PCM990_CTRL_MMC2PWR;
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val |= PCM990_CTRL_MMC2PWR;
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else
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__PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
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~PCM990_CTRL_MMC2PWR;
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val &= ~PCM990_CTRL_MMC2PWR;
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pcm990_cpld_writeb(PCM990_CTRL_MMC2PWR, PCM990_CTRL_REG5);
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}
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static void pcm990_mci_exit(struct device *dev, void *data)
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@ -480,23 +511,6 @@ static struct platform_device pcm990_camera[] = {
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};
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#endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */
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/*
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* enable generic access to the base board control CPLDs U6 and U7
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*/
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static struct map_desc pcm990_io_desc[] __initdata = {
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{
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.virtual = PCM990_CTRL_BASE,
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.pfn = __phys_to_pfn(PCM990_CTRL_PHYS),
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.length = PCM990_CTRL_SIZE,
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.type = MT_DEVICE /* CPLD */
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}, {
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.virtual = PCM990_CF_PLD_BASE,
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.pfn = __phys_to_pfn(PCM990_CF_PLD_PHYS),
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.length = PCM990_CF_PLD_SIZE,
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.type = MT_DEVICE /* CPLD */
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}
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};
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/*
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* system init for baseboard usage. Will be called by pcm027 init.
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*
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@ -507,8 +521,11 @@ void __init pcm990_baseboard_init(void)
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{
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pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config));
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/* register CPLD access */
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iotable_init(ARRAY_AND_SIZE(pcm990_io_desc));
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pcm990_cpld_base = ioremap(PCM990_CTRL_PHYS, PCM990_CTRL_SIZE);
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if (!pcm990_cpld_base) {
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pr_err("pcm990: failed to ioremap cpld\n");
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return;
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}
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/* register CPLD's IRQ controller */
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pcm990_init_irq();
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