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ACPICA: Disable preservation of SCI enable bit (SCI_EN)
Preserving this bit breaks some machines. Not preserving this bit seems to work OK in all cases, even though this goes against the ACPI spec. http://bugzilla.kernel.org/show_bug.cgi?id=13289 Signed-off-by: Bob Moore <robert.moore@intel.com> Signed-off-by: Lin Ming <ming.m.lin@intel.com> Signed-off-by: Len Brown <len.brown@intel.com>
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@ -789,11 +789,14 @@ struct acpi_bit_register_info {
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/* For control registers, both ignored and reserved bits must be preserved */
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/* For control registers, both ignored and reserved bits must be preserved */
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/*
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/*
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* The ACPI spec says to ignore PM1_CTL.SCI_EN (bit 0)
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* For PM1 control, the SCI enable bit (bit 0, SCI_EN) is defined by the
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* but we need to be able to write ACPI_BITREG_SCI_ENABLE directly
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* ACPI specification to be a "preserved" bit - "OSPM always preserves this
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* as a BIOS workaround on some machines.
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* bit position", section 4.7.3.2.1. However, on some machines the OS must
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* write a one to this bit after resume for the machine to work properly.
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* To enable this, we no longer attempt to preserve this bit. No machines
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* are known to fail if the bit is not preserved. (May 2009)
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*/
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*/
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#define ACPI_PM1_CONTROL_IGNORED_BITS 0x0200 /* Bits 9 */
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#define ACPI_PM1_CONTROL_IGNORED_BITS 0x0200 /* Bit 9 */
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#define ACPI_PM1_CONTROL_RESERVED_BITS 0xC1F8 /* Bits 14-15, 3-8 */
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#define ACPI_PM1_CONTROL_RESERVED_BITS 0xC1F8 /* Bits 14-15, 3-8 */
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#define ACPI_PM1_CONTROL_PRESERVED_BITS \
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#define ACPI_PM1_CONTROL_PRESERVED_BITS \
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(ACPI_PM1_CONTROL_IGNORED_BITS | ACPI_PM1_CONTROL_RESERVED_BITS)
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(ACPI_PM1_CONTROL_IGNORED_BITS | ACPI_PM1_CONTROL_RESERVED_BITS)
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