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WAN: HD64572 already handles TX underruns with DMAC.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
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@ -232,19 +232,12 @@ static inline void sca_msci_intr(port_t *port)
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{
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u16 msci = get_msci(port);
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card_t* card = port_to_card(port);
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u8 stat = sca_in(msci + ST1, card); /* read MSCI ST1 status */
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/* Reset MSCI TX underrun and CDCD status bit */
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sca_out(stat & (ST1_UDRN | ST1_CDCD), msci + ST1, card);
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if (stat & ST1_UDRN) {
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/* TX Underrun error detected */
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port_to_dev(port)->stats.tx_errors++;
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port_to_dev(port)->stats.tx_fifo_errors++;
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}
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if (stat & ST1_CDCD)
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if (sca_in(msci + ST1, card) & ST1_CDCD) {
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/* Reset MSCI CDCD status bit */
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sca_out(ST1_CDCD, msci + ST1, card);
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sca_set_carrier(port);
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}
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}
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@ -351,11 +344,17 @@ static inline void sca_tx_done(port_t *port)
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while (1) {
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pkt_desc __iomem *desc = desc_address(port, port->txlast, 1);
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u8 stat = readb(&desc->stat);
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if (!(readb(&desc->stat) & ST_TX_OWNRSHP))
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if (!(stat & ST_TX_OWNRSHP))
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break; /* not yet transmitted */
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dev->stats.tx_packets++;
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dev->stats.tx_bytes += readw(&desc->len);
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if (stat & ST_TX_UNDRRUN) {
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dev->stats.tx_errors++;
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dev->stats.tx_fifo_errors++;
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} else {
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dev->stats.tx_packets++;
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dev->stats.tx_bytes += readw(&desc->len);
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}
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writeb(0, &desc->stat); /* Free descriptor */
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port->txlast = next_desc(port, port->txlast, 1);
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}
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@ -503,12 +502,11 @@ static void sca_open(struct net_device *dev)
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sca_out(0x3F, msci + TNR1, card); /* +1=TX DMA deactivation condition*/
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/* We're using the following interrupts:
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- TXINT (DMAC completed all transmissions, underrun or DCD change)
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- TXINT (DMAC completed all transmissions and DCD changes)
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- all DMA interrupts
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*/
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/* MSCI TXINT and RXINTA interrupt enable */
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sca_outl(IE0_TXINT | IE0_RXINTA | IE0_UDRN | IE0_CDCD, msci + IE0,
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card);
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sca_outl(IE0_TXINT | IE0_RXINTA | IE0_CDCD, msci + IE0, card);
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sca_out(port->tmc, msci + TMCR, card);
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sca_out(port->tmc, msci + TMCT, card);
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