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ASoC: imx: rename audmux prefix mxc to imx
It renames the legacy name mxc used in audmux function and macro to imx. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Shawn Guo
Mark Brown
parent
3c77c29c49
commit
af4872fb39
@ -101,35 +101,35 @@ static int __init eukrea_tlv320_init(void)
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int int_port = 0, ext_port;
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if (machine_is_eukrea_cpuimx27()) {
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mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
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MXC_AUDMUX_V1_PCR_SYN |
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MXC_AUDMUX_V1_PCR_TFSDIR |
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MXC_AUDMUX_V1_PCR_TCLKDIR |
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MXC_AUDMUX_V1_PCR_RFSDIR |
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MXC_AUDMUX_V1_PCR_RCLKDIR |
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MXC_AUDMUX_V1_PCR_TFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) |
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MXC_AUDMUX_V1_PCR_RFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) |
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MXC_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4)
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imx_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
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IMX_AUDMUX_V1_PCR_SYN |
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IMX_AUDMUX_V1_PCR_TFSDIR |
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IMX_AUDMUX_V1_PCR_TCLKDIR |
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IMX_AUDMUX_V1_PCR_RFSDIR |
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IMX_AUDMUX_V1_PCR_RCLKDIR |
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IMX_AUDMUX_V1_PCR_TFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) |
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IMX_AUDMUX_V1_PCR_RFCSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4) |
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IMX_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR3_SSI_PINS_4)
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);
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mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR3_SSI_PINS_4,
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MXC_AUDMUX_V1_PCR_SYN |
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MXC_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR1_SSI0)
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imx_audmux_v1_configure_port(MX27_AUDMUX_HPCR3_SSI_PINS_4,
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IMX_AUDMUX_V1_PCR_SYN |
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IMX_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR1_SSI0)
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);
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} else if (machine_is_eukrea_cpuimx25sd() ||
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machine_is_eukrea_cpuimx35sd() ||
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machine_is_eukrea_cpuimx51sd()) {
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ext_port = machine_is_eukrea_cpuimx25sd() ? 4 : 3;
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mxc_audmux_v2_configure_port(int_port,
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MXC_AUDMUX_V2_PTCR_SYN |
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MXC_AUDMUX_V2_PTCR_TFSDIR |
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MXC_AUDMUX_V2_PTCR_TFSEL(ext_port) |
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MXC_AUDMUX_V2_PTCR_TCLKDIR |
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MXC_AUDMUX_V2_PTCR_TCSEL(ext_port),
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MXC_AUDMUX_V2_PDCR_RXDSEL(ext_port)
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imx_audmux_v2_configure_port(int_port,
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IMX_AUDMUX_V2_PTCR_SYN |
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IMX_AUDMUX_V2_PTCR_TFSDIR |
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IMX_AUDMUX_V2_PTCR_TFSEL(ext_port) |
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IMX_AUDMUX_V2_PTCR_TCLKDIR |
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IMX_AUDMUX_V2_PTCR_TCSEL(ext_port),
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IMX_AUDMUX_V2_PDCR_RXDSEL(ext_port)
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);
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mxc_audmux_v2_configure_port(ext_port,
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MXC_AUDMUX_V2_PTCR_SYN,
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MXC_AUDMUX_V2_PDCR_RXDSEL(int_port)
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imx_audmux_v2_configure_port(ext_port,
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IMX_AUDMUX_V2_PTCR_SYN,
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IMX_AUDMUX_V2_PDCR_RXDSEL(int_port)
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);
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} else {
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/* return happy. We might run on a totally different machine */
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@ -32,8 +32,8 @@
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static struct clk *audmux_clk;
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static void __iomem *audmux_base;
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#define MXC_AUDMUX_V2_PTCR(x) ((x) * 8)
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#define MXC_AUDMUX_V2_PDCR(x) ((x) * 8 + 4)
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#define IMX_AUDMUX_V2_PTCR(x) ((x) * 8)
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#define IMX_AUDMUX_V2_PDCR(x) ((x) * 8 + 4)
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#ifdef CONFIG_DEBUG_FS
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static struct dentry *audmux_debugfs_root;
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@ -80,8 +80,8 @@ static ssize_t audmux_read_file(struct file *file, char __user *user_buf,
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if (audmux_clk)
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clk_enable(audmux_clk);
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ptcr = readl(audmux_base + MXC_AUDMUX_V2_PTCR(port));
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pdcr = readl(audmux_base + MXC_AUDMUX_V2_PDCR(port));
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ptcr = readl(audmux_base + IMX_AUDMUX_V2_PTCR(port));
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pdcr = readl(audmux_base + IMX_AUDMUX_V2_PDCR(port));
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if (audmux_clk)
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clk_disable(audmux_clk);
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@ -89,7 +89,7 @@ static ssize_t audmux_read_file(struct file *file, char __user *user_buf,
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ret = snprintf(buf, PAGE_SIZE, "PDCR: %08x\nPTCR: %08x\n",
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pdcr, ptcr);
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if (ptcr & MXC_AUDMUX_V2_PTCR_TFSDIR)
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if (ptcr & IMX_AUDMUX_V2_PTCR_TFSDIR)
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ret += snprintf(buf + ret, PAGE_SIZE - ret,
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"TxFS output from %s, ",
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audmux_port_string((ptcr >> 27) & 0x7));
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@ -97,7 +97,7 @@ static ssize_t audmux_read_file(struct file *file, char __user *user_buf,
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ret += snprintf(buf + ret, PAGE_SIZE - ret,
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"TxFS input, ");
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if (ptcr & MXC_AUDMUX_V2_PTCR_TCLKDIR)
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if (ptcr & IMX_AUDMUX_V2_PTCR_TCLKDIR)
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ret += snprintf(buf + ret, PAGE_SIZE - ret,
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"TxClk output from %s",
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audmux_port_string((ptcr >> 22) & 0x7));
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@ -107,11 +107,11 @@ static ssize_t audmux_read_file(struct file *file, char __user *user_buf,
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ret += snprintf(buf + ret, PAGE_SIZE - ret, "\n");
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if (ptcr & MXC_AUDMUX_V2_PTCR_SYN) {
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if (ptcr & IMX_AUDMUX_V2_PTCR_SYN) {
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ret += snprintf(buf + ret, PAGE_SIZE - ret,
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"Port is symmetric");
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} else {
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if (ptcr & MXC_AUDMUX_V2_PTCR_RFSDIR)
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if (ptcr & IMX_AUDMUX_V2_PTCR_RFSDIR)
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ret += snprintf(buf + ret, PAGE_SIZE - ret,
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"RxFS output from %s, ",
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audmux_port_string((ptcr >> 17) & 0x7));
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@ -119,7 +119,7 @@ static ssize_t audmux_read_file(struct file *file, char __user *user_buf,
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ret += snprintf(buf + ret, PAGE_SIZE - ret,
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"RxFS input, ");
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if (ptcr & MXC_AUDMUX_V2_PTCR_RCLKDIR)
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if (ptcr & IMX_AUDMUX_V2_PTCR_RCLKDIR)
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ret += snprintf(buf + ret, PAGE_SIZE - ret,
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"RxClk output from %s",
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audmux_port_string((ptcr >> 12) & 0x7));
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@ -201,7 +201,7 @@ static const uint8_t port_mapping[] = {
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0x0, 0x4, 0x8, 0x10, 0x14, 0x1c,
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};
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int mxc_audmux_v1_configure_port(unsigned int port, unsigned int pcr)
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int imx_audmux_v1_configure_port(unsigned int port, unsigned int pcr)
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{
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if (audmux_type != IMX21_AUDMUX)
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return -EINVAL;
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@ -216,9 +216,9 @@ int mxc_audmux_v1_configure_port(unsigned int port, unsigned int pcr)
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return 0;
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}
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EXPORT_SYMBOL_GPL(mxc_audmux_v1_configure_port);
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EXPORT_SYMBOL_GPL(imx_audmux_v1_configure_port);
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int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
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int imx_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
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unsigned int pdcr)
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{
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if (audmux_type != IMX31_AUDMUX)
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@ -230,15 +230,15 @@ int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
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if (audmux_clk)
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clk_enable(audmux_clk);
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writel(ptcr, audmux_base + MXC_AUDMUX_V2_PTCR(port));
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writel(pdcr, audmux_base + MXC_AUDMUX_V2_PDCR(port));
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writel(ptcr, audmux_base + IMX_AUDMUX_V2_PTCR(port));
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writel(pdcr, audmux_base + IMX_AUDMUX_V2_PDCR(port));
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if (audmux_clk)
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clk_disable(audmux_clk);
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return 0;
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}
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EXPORT_SYMBOL_GPL(mxc_audmux_v2_configure_port);
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EXPORT_SYMBOL_GPL(imx_audmux_v2_configure_port);
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static int __init imx_audmux_probe(struct platform_device *pdev)
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{
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@ -24,37 +24,37 @@
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#define MX51_AUDMUX_PORT7 6
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/* Register definitions for the i.MX21/27 Digital Audio Multiplexer */
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#define MXC_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff)
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#define MXC_AUDMUX_V1_PCR_INMEN (1 << 8)
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#define MXC_AUDMUX_V1_PCR_TXRXEN (1 << 10)
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#define MXC_AUDMUX_V1_PCR_SYN (1 << 12)
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#define MXC_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13)
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#define MXC_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20)
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#define MXC_AUDMUX_V1_PCR_RCLKDIR (1 << 24)
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#define MXC_AUDMUX_V1_PCR_RFSDIR (1 << 25)
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#define MXC_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26)
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#define MXC_AUDMUX_V1_PCR_TCLKDIR (1 << 30)
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#define MXC_AUDMUX_V1_PCR_TFSDIR (1 << 31)
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#define IMX_AUDMUX_V1_PCR_INMMASK(x) ((x) & 0xff)
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#define IMX_AUDMUX_V1_PCR_INMEN (1 << 8)
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#define IMX_AUDMUX_V1_PCR_TXRXEN (1 << 10)
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#define IMX_AUDMUX_V1_PCR_SYN (1 << 12)
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#define IMX_AUDMUX_V1_PCR_RXDSEL(x) (((x) & 0x7) << 13)
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#define IMX_AUDMUX_V1_PCR_RFCSEL(x) (((x) & 0xf) << 20)
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#define IMX_AUDMUX_V1_PCR_RCLKDIR (1 << 24)
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#define IMX_AUDMUX_V1_PCR_RFSDIR (1 << 25)
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#define IMX_AUDMUX_V1_PCR_TFCSEL(x) (((x) & 0xf) << 26)
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#define IMX_AUDMUX_V1_PCR_TCLKDIR (1 << 30)
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#define IMX_AUDMUX_V1_PCR_TFSDIR (1 << 31)
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/* Register definitions for the i.MX25/31/35/51 Digital Audio Multiplexer */
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#define MXC_AUDMUX_V2_PTCR_TFSDIR (1 << 31)
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#define MXC_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27)
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#define MXC_AUDMUX_V2_PTCR_TCLKDIR (1 << 26)
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#define MXC_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22)
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#define MXC_AUDMUX_V2_PTCR_RFSDIR (1 << 21)
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#define MXC_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17)
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#define MXC_AUDMUX_V2_PTCR_RCLKDIR (1 << 16)
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#define MXC_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12)
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#define MXC_AUDMUX_V2_PTCR_SYN (1 << 11)
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#define IMX_AUDMUX_V2_PTCR_TFSDIR (1 << 31)
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#define IMX_AUDMUX_V2_PTCR_TFSEL(x) (((x) & 0xf) << 27)
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#define IMX_AUDMUX_V2_PTCR_TCLKDIR (1 << 26)
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#define IMX_AUDMUX_V2_PTCR_TCSEL(x) (((x) & 0xf) << 22)
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#define IMX_AUDMUX_V2_PTCR_RFSDIR (1 << 21)
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#define IMX_AUDMUX_V2_PTCR_RFSEL(x) (((x) & 0xf) << 17)
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#define IMX_AUDMUX_V2_PTCR_RCLKDIR (1 << 16)
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#define IMX_AUDMUX_V2_PTCR_RCSEL(x) (((x) & 0xf) << 12)
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#define IMX_AUDMUX_V2_PTCR_SYN (1 << 11)
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#define MXC_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13)
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#define MXC_AUDMUX_V2_PDCR_TXRXEN (1 << 12)
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#define MXC_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8)
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#define MXC_AUDMUX_V2_PDCR_INMMASK(x) ((x) & 0xff)
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#define IMX_AUDMUX_V2_PDCR_RXDSEL(x) (((x) & 0x7) << 13)
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#define IMX_AUDMUX_V2_PDCR_TXRXEN (1 << 12)
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#define IMX_AUDMUX_V2_PDCR_MODE(x) (((x) & 0x3) << 8)
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#define IMX_AUDMUX_V2_PDCR_INMMASK(x) ((x) & 0xff)
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int mxc_audmux_v1_configure_port(unsigned int port, unsigned int pcr);
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int imx_audmux_v1_configure_port(unsigned int port, unsigned int pcr);
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int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
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int imx_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
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unsigned int pdcr);
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#endif /* __IMX_AUDMUX_H */
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@ -207,16 +207,16 @@ static int __init mx27vis_aic32x4_init(void)
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}
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/* Connect SSI0 as clock slave to SSI1 external pins */
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mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
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MXC_AUDMUX_V1_PCR_SYN |
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MXC_AUDMUX_V1_PCR_TFSDIR |
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MXC_AUDMUX_V1_PCR_TCLKDIR |
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MXC_AUDMUX_V1_PCR_TFCSEL(MX27_AUDMUX_PPCR1_SSI_PINS_1) |
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MXC_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_PPCR1_SSI_PINS_1)
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imx_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
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IMX_AUDMUX_V1_PCR_SYN |
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IMX_AUDMUX_V1_PCR_TFSDIR |
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IMX_AUDMUX_V1_PCR_TCLKDIR |
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IMX_AUDMUX_V1_PCR_TFCSEL(MX27_AUDMUX_PPCR1_SSI_PINS_1) |
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IMX_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_PPCR1_SSI_PINS_1)
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);
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mxc_audmux_v1_configure_port(MX27_AUDMUX_PPCR1_SSI_PINS_1,
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MXC_AUDMUX_V1_PCR_SYN |
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MXC_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR1_SSI0)
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imx_audmux_v1_configure_port(MX27_AUDMUX_PPCR1_SSI_PINS_1,
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IMX_AUDMUX_V1_PCR_SYN |
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IMX_AUDMUX_V1_PCR_RXDSEL(MX27_AUDMUX_HPCR1_SSI0)
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);
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ret = mxc_gpio_setup_multiple_pins(mx27vis_amp_pins,
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@ -53,27 +53,27 @@ static int __init imx_phycore_init(void)
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int ret;
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if (machine_is_pca100()) {
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mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
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MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
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MXC_AUDMUX_V1_PCR_TFCSEL(3) |
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MXC_AUDMUX_V1_PCR_TCLKDIR | /* clock is output */
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MXC_AUDMUX_V1_PCR_RXDSEL(3));
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mxc_audmux_v1_configure_port(3,
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MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
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MXC_AUDMUX_V1_PCR_TFCSEL(0) |
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MXC_AUDMUX_V1_PCR_TFSDIR |
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MXC_AUDMUX_V1_PCR_RXDSEL(0));
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imx_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
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IMX_AUDMUX_V1_PCR_SYN | /* 4wire mode */
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IMX_AUDMUX_V1_PCR_TFCSEL(3) |
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IMX_AUDMUX_V1_PCR_TCLKDIR | /* clock is output */
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IMX_AUDMUX_V1_PCR_RXDSEL(3));
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imx_audmux_v1_configure_port(3,
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IMX_AUDMUX_V1_PCR_SYN | /* 4wire mode */
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IMX_AUDMUX_V1_PCR_TFCSEL(0) |
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IMX_AUDMUX_V1_PCR_TFSDIR |
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IMX_AUDMUX_V1_PCR_RXDSEL(0));
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} else if (machine_is_pcm043()) {
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mxc_audmux_v2_configure_port(3,
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MXC_AUDMUX_V2_PTCR_SYN | /* 4wire mode */
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MXC_AUDMUX_V2_PTCR_TFSEL(0) |
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MXC_AUDMUX_V2_PTCR_TFSDIR,
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MXC_AUDMUX_V2_PDCR_RXDSEL(0));
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mxc_audmux_v2_configure_port(0,
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MXC_AUDMUX_V2_PTCR_SYN | /* 4wire mode */
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MXC_AUDMUX_V2_PTCR_TCSEL(3) |
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MXC_AUDMUX_V2_PTCR_TCLKDIR, /* clock is output */
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MXC_AUDMUX_V2_PDCR_RXDSEL(3));
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imx_audmux_v2_configure_port(3,
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IMX_AUDMUX_V2_PTCR_SYN | /* 4wire mode */
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IMX_AUDMUX_V2_PTCR_TFSEL(0) |
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IMX_AUDMUX_V2_PTCR_TFSDIR,
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IMX_AUDMUX_V2_PDCR_RXDSEL(0));
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imx_audmux_v2_configure_port(0,
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IMX_AUDMUX_V2_PTCR_SYN | /* 4wire mode */
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IMX_AUDMUX_V2_PTCR_TCSEL(3) |
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IMX_AUDMUX_V2_PTCR_TCLKDIR, /* clock is output */
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IMX_AUDMUX_V2_PDCR_RXDSEL(3));
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} else {
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/* return happy. We might run on a totally different machine */
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return 0;
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@ -267,17 +267,17 @@ static int __init wm1133_ev1_audio_init(void)
|
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unsigned int ptcr, pdcr;
|
||||
|
||||
/* SSI0 mastered by port 5 */
|
||||
ptcr = MXC_AUDMUX_V2_PTCR_SYN |
|
||||
MXC_AUDMUX_V2_PTCR_TFSDIR |
|
||||
MXC_AUDMUX_V2_PTCR_TFSEL(MX31_AUDMUX_PORT5_SSI_PINS_5) |
|
||||
MXC_AUDMUX_V2_PTCR_TCLKDIR |
|
||||
MXC_AUDMUX_V2_PTCR_TCSEL(MX31_AUDMUX_PORT5_SSI_PINS_5);
|
||||
pdcr = MXC_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT5_SSI_PINS_5);
|
||||
mxc_audmux_v2_configure_port(MX31_AUDMUX_PORT1_SSI0, ptcr, pdcr);
|
||||
ptcr = IMX_AUDMUX_V2_PTCR_SYN |
|
||||
IMX_AUDMUX_V2_PTCR_TFSDIR |
|
||||
IMX_AUDMUX_V2_PTCR_TFSEL(MX31_AUDMUX_PORT5_SSI_PINS_5) |
|
||||
IMX_AUDMUX_V2_PTCR_TCLKDIR |
|
||||
IMX_AUDMUX_V2_PTCR_TCSEL(MX31_AUDMUX_PORT5_SSI_PINS_5);
|
||||
pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT5_SSI_PINS_5);
|
||||
imx_audmux_v2_configure_port(MX31_AUDMUX_PORT1_SSI0, ptcr, pdcr);
|
||||
|
||||
ptcr = MXC_AUDMUX_V2_PTCR_SYN;
|
||||
pdcr = MXC_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT1_SSI0);
|
||||
mxc_audmux_v2_configure_port(MX31_AUDMUX_PORT5_SSI_PINS_5, ptcr, pdcr);
|
||||
ptcr = IMX_AUDMUX_V2_PTCR_SYN;
|
||||
pdcr = IMX_AUDMUX_V2_PDCR_RXDSEL(MX31_AUDMUX_PORT1_SSI0);
|
||||
imx_audmux_v2_configure_port(MX31_AUDMUX_PORT5_SSI_PINS_5, ptcr, pdcr);
|
||||
|
||||
wm1133_ev1_snd_device = platform_device_alloc("soc-audio", -1);
|
||||
if (!wm1133_ev1_snd_device)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user