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drm/amdgpu: Add infrastructure for Cleaner Shader feature

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The cleaner shader is used by the CP firmware to clean LDS and GPRs
between processes on the CUs.

This adds an internal API for GFX IP code to allocate and initialize the
cleaner shader.

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Suggested-by: Christian König <christian.koenig@amd.com>
This commit is contained in:
Srinivasan Shanmugam 2024-06-06 13:12:40 +05:30 committed by Alex Deucher
parent f49280ffd2
commit aec773a1fb
2 changed files with 49 additions and 0 deletions
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35
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
View File

@ -1416,3 +1416,38 @@ void amdgpu_gfx_sysfs_fini(struct amdgpu_device *adev)
device_remove_file(adev->dev, &dev_attr_current_compute_partition);
device_remove_file(adev->dev, &dev_attr_available_compute_partition);
}
int amdgpu_gfx_cleaner_shader_sw_init(struct amdgpu_device *adev,
unsigned int cleaner_shader_size)
{
if (!adev->gfx.enable_cleaner_shader)
return -EOPNOTSUPP;
return amdgpu_bo_create_kernel(adev, cleaner_shader_size, PAGE_SIZE,
AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT,
&adev->gfx.cleaner_shader_obj,
&adev->gfx.cleaner_shader_gpu_addr,
(void **)&adev->gfx.cleaner_shader_cpu_ptr);
}
void amdgpu_gfx_cleaner_shader_sw_fini(struct amdgpu_device *adev)
{
if (!adev->gfx.enable_cleaner_shader)
return;
amdgpu_bo_free_kernel(&adev->gfx.cleaner_shader_obj,
&adev->gfx.cleaner_shader_gpu_addr,
(void **)&adev->gfx.cleaner_shader_cpu_ptr);
}
void amdgpu_gfx_cleaner_shader_init(struct amdgpu_device *adev,
unsigned int cleaner_shader_size,
const void *cleaner_shader_ptr)
{
if (!adev->gfx.enable_cleaner_shader)
return;
if (adev->gfx.cleaner_shader_cpu_ptr && cleaner_shader_ptr)
memcpy_toio(adev->gfx.cleaner_shader_cpu_ptr, cleaner_shader_ptr,
cleaner_shader_size);
}

14
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
View File

@ -446,6 +446,14 @@ struct amdgpu_gfx {
uint32_t *ip_dump_gfx_queues;
struct mutex reset_sem_mutex;
/* cleaner shader */
struct amdgpu_bo *cleaner_shader_obj;
unsigned int cleaner_shader_size;
u64 cleaner_shader_gpu_addr;
void *cleaner_shader_cpu_ptr;
const void *cleaner_shader_ptr;
bool enable_cleaner_shader;
};
struct amdgpu_gfx_ras_reg_entry {
@ -547,6 +555,12 @@ void amdgpu_gfx_ras_error_func(struct amdgpu_device *adev,
void *ras_error_status,
void (*func)(struct amdgpu_device *adev, void *ras_error_status,
int xcc_id));
int amdgpu_gfx_cleaner_shader_sw_init(struct amdgpu_device *adev,
unsigned int cleaner_shader_size);
void amdgpu_gfx_cleaner_shader_sw_fini(struct amdgpu_device *adev);
void amdgpu_gfx_cleaner_shader_init(struct amdgpu_device *adev,
unsigned int cleaner_shader_size,
const void *cleaner_shader_ptr);
static inline const char *amdgpu_gfx_compute_mode_desc(int mode)
{