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x86: cleanup smp.h variants
Bring the smp.h variants into sync to prepare merging and paravirt support. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -42,6 +42,7 @@ extern int local_apic_timer_disabled;
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extern int apic_runs_main_timer;
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extern int ioapic_force;
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extern int disable_apic;
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extern int disable_apic_timer;
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extern unsigned boot_cpu_id;
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@ -13,8 +13,11 @@ extern int quad_local_to_mp_bus_id[NR_CPUS/4][4];
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extern unsigned int def_to_bigsmp;
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extern int apic_version[MAX_APICS];
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extern u8 apicid_2_node[];
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extern int pic_mode;
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#define MAX_APICID 256
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#else
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#define MAX_MP_BUSSES 256
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@ -1,58 +1,51 @@
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#ifndef __ASM_SMP_H
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#define __ASM_SMP_H
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#ifndef __ASSEMBLY__
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#include <linux/cpumask.h>
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#include <linux/init.h>
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/*
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* We need the APIC definitions automatically as part of 'smp.h'
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*/
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#ifndef __ASSEMBLY__
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#include <linux/kernel.h>
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#ifdef CONFIG_X86_LOCAL_APIC
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# include <asm/mpspec.h>
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# include <asm/apic.h>
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# ifdef CONFIG_X86_IO_APIC
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# include <asm/io_apic.h>
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# endif
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#endif
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#if defined(CONFIG_X86_LOCAL_APIC) && !defined(__ASSEMBLY__)
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#include <linux/bitops.h>
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#include <asm/mpspec.h>
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#include <asm/apic.h>
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#ifdef CONFIG_X86_IO_APIC
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#include <asm/io_apic.h>
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#endif
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#endif
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extern cpumask_t cpu_callout_map;
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extern cpumask_t cpu_callin_map;
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#define BAD_APICID 0xFFu
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#ifdef CONFIG_SMP
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#ifndef __ASSEMBLY__
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/*
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* Private routines/data
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*/
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extern void smp_alloc_memory(void);
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extern int pic_mode;
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extern int smp_num_siblings;
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DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
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DECLARE_PER_CPU(cpumask_t, cpu_core_map);
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extern unsigned int num_processors;
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extern void (*mtrr_hook) (void);
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extern void zap_low_mappings (void);
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extern void smp_alloc_memory(void);
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extern void lock_ipi_call_lock(void);
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extern void unlock_ipi_call_lock(void);
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#define MAX_APICID 256
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extern void (*mtrr_hook) (void);
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extern void zap_low_mappings (void);
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extern u8 __initdata x86_cpu_to_apicid_init[];
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extern void *x86_cpu_to_apicid_ptr;
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DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
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DECLARE_PER_CPU(cpumask_t, cpu_core_map);
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DECLARE_PER_CPU(u8, cpu_llc_id);
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DECLARE_PER_CPU(u8, x86_cpu_to_apicid);
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#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
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extern void set_cpu_sibling_map(int cpu);
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#ifdef CONFIG_HOTPLUG_CPU
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extern void cpu_exit_clear(void);
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extern void cpu_uninit(void);
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extern void remove_siblinginfo(int cpu);
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#endif
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/* Globals due to paravirt */
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extern void set_cpu_sibling_map(int cpu);
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struct smp_ops
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{
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void (*smp_prepare_boot_cpu)(void);
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@ -67,6 +60,7 @@ struct smp_ops
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int wait);
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};
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#ifdef CONFIG_SMP
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extern struct smp_ops smp_ops;
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static inline void smp_prepare_boot_cpu(void)
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@ -107,10 +101,12 @@ int native_cpu_up(unsigned int cpunum);
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void native_smp_cpus_done(unsigned int max_cpus);
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#ifndef CONFIG_PARAVIRT
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#define startup_ipi_hook(phys_apicid, start_eip, start_esp) \
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do { } while (0)
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#define startup_ipi_hook(phys_apicid, start_eip, start_esp) do { } while (0)
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#endif
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extern int __cpu_disable(void);
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extern void __cpu_die(unsigned int cpu);
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/*
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* This function is needed by all SMP systems. It must _always_ be valid
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* from the initial startup. We map APIC_BASE very early in page_setup(),
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@ -119,9 +115,11 @@ do { } while (0)
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DECLARE_PER_CPU(int, cpu_number);
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#define raw_smp_processor_id() (x86_read_percpu(cpu_number))
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extern cpumask_t cpu_callout_map;
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extern cpumask_t cpu_callin_map;
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extern cpumask_t cpu_possible_map;
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#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
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extern int safe_smp_processor_id(void);
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void __cpuinit smp_store_cpu_info(int id);
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/* We don't mark CPUs online until __cpu_up(), so we need another measure */
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static inline int num_booting_cpus(void)
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@ -129,56 +127,39 @@ static inline int num_booting_cpus(void)
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return cpus_weight(cpu_callout_map);
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}
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extern int safe_smp_processor_id(void);
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extern int __cpu_disable(void);
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extern void __cpu_die(unsigned int cpu);
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extern unsigned int num_processors;
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void __cpuinit smp_store_cpu_info(int id);
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#endif /* !__ASSEMBLY__ */
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#else /* CONFIG_SMP */
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#define safe_smp_processor_id() 0
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#define cpu_physical_id(cpu) boot_cpu_physical_apicid
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#define NO_PROC_ID 0xFF /* No processor magic marker */
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#endif /* CONFIG_SMP */
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#ifndef __ASSEMBLY__
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#endif /* !CONFIG_SMP */
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#ifdef CONFIG_X86_LOCAL_APIC
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#ifdef APIC_DEFINITION
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extern int hard_smp_processor_id(void);
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#else
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#include <mach_apicdef.h>
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static inline int hard_smp_processor_id(void)
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{
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/* we don't want to mark this access volatile - bad code generation */
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return GET_APIC_ID(*(unsigned long *)(APIC_BASE+APIC_ID));
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}
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#endif /* APIC_DEFINITION */
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#else /* CONFIG_X86_LOCAL_APIC */
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#ifndef CONFIG_SMP
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#define hard_smp_processor_id() 0
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#endif
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#endif /* CONFIG_X86_LOCAL_APIC */
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extern u8 apicid_2_node[];
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#ifdef CONFIG_X86_LOCAL_APIC
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static __inline int logical_smp_processor_id(void)
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{
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/* we don't want to mark this access volatile - bad code generation */
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return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
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return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR));
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}
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#endif
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#endif
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# ifdef APIC_DEFINITION
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extern int hard_smp_processor_id(void);
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# else
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# include <mach_apicdef.h>
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static inline int hard_smp_processor_id(void)
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{
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/* we don't want to mark this access volatile - bad code generation */
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return GET_APIC_ID(*(u32 *)(APIC_BASE + APIC_ID));
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}
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# endif /* APIC_DEFINITION */
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#else /* CONFIG_X86_LOCAL_APIC */
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# ifndef CONFIG_SMP
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# define hard_smp_processor_id() 0
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# endif
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#endif /* CONFIG_X86_LOCAL_APIC */
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#endif /* !ASSEMBLY */
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#endif
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@ -1,97 +1,39 @@
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#ifndef __ASM_SMP_H
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#define __ASM_SMP_H
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#include <linux/cpumask.h>
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#include <linux/init.h>
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/*
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* We need the APIC definitions automatically as part of 'smp.h'
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*/
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#include <linux/threads.h>
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#include <linux/cpumask.h>
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#include <linux/bitops.h>
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#include <linux/init.h>
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extern int disable_apic;
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#include <asm/mpspec.h>
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#include <asm/apic.h>
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#include <asm/io_apic.h>
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#include <asm/mpspec.h>
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#include <asm/pda.h>
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#include <asm/thread_info.h>
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#ifdef CONFIG_SMP
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#include <asm/pda.h>
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struct pt_regs;
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extern cpumask_t cpu_present_mask;
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extern cpumask_t cpu_possible_map;
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extern cpumask_t cpu_online_map;
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extern cpumask_t cpu_callout_map;
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extern cpumask_t cpu_initialized;
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/*
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* Private routines/data
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*/
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extern int smp_num_siblings;
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extern unsigned int num_processors;
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extern void smp_alloc_memory(void);
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extern volatile unsigned long smp_invalidate_needed;
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extern void lock_ipi_call_lock(void);
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extern void unlock_ipi_call_lock(void);
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extern int smp_num_siblings;
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extern void smp_send_reschedule(int cpu);
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extern int smp_call_function_mask(cpumask_t mask, void (*func)(void *),
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void *info, int wait);
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/*
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* cpu_sibling_map and cpu_core_map now live
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* in the per cpu area
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*
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* extern cpumask_t cpu_sibling_map[NR_CPUS];
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* extern cpumask_t cpu_core_map[NR_CPUS];
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*/
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extern u8 __initdata x86_cpu_to_apicid_init[];
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extern void *x86_cpu_to_apicid_ptr;
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extern u8 bios_cpu_apicid[];
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DECLARE_PER_CPU(cpumask_t, cpu_sibling_map);
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DECLARE_PER_CPU(cpumask_t, cpu_core_map);
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DECLARE_PER_CPU(u8, cpu_llc_id);
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#define SMP_TRAMPOLINE_BASE 0x6000
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/*
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* On x86 all CPUs are mapped 1:1 to the APIC space.
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* This simplifies scheduling and IPI sending and
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* compresses data structures.
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*/
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static inline int num_booting_cpus(void)
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{
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return cpus_weight(cpu_callout_map);
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}
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#define raw_smp_processor_id() read_pda(cpunumber)
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extern int __cpu_disable(void);
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extern void __cpu_die(unsigned int cpu);
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extern void prefill_possible_map(void);
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extern unsigned num_processors;
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extern unsigned __cpuinitdata disabled_cpus;
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#define NO_PROC_ID 0xFF /* No processor magic marker */
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#endif /* CONFIG_SMP */
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#define safe_smp_processor_id() smp_processor_id()
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static inline int hard_smp_processor_id(void)
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{
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/* we don't want to mark this access volatile - bad code generation */
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return GET_APIC_ID(*(unsigned int *)(APIC_BASE+APIC_ID));
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}
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/*
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* Some lowlevel functions might want to know about
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* the real APIC ID <-> CPU # mapping.
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*/
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extern u8 __initdata x86_cpu_to_apicid_init[];
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extern void *x86_cpu_to_apicid_ptr;
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DECLARE_PER_CPU(u8, x86_cpu_to_apicid); /* physical ID */
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extern u8 bios_cpu_apicid[];
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DECLARE_PER_CPU(u8, x86_cpu_to_apicid);
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static inline int cpu_present_to_apicid(int mps_cpu)
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{
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@ -101,30 +43,57 @@ static inline int cpu_present_to_apicid(int mps_cpu)
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return BAD_APICID;
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}
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#ifndef CONFIG_SMP
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#define stack_smp_processor_id() 0
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#define cpu_logical_map(x) (x)
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#else
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#include <asm/thread_info.h>
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#define stack_smp_processor_id() \
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({ \
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struct thread_info *ti; \
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#ifdef CONFIG_SMP
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#define SMP_TRAMPOLINE_BASE 0x6000
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extern int __cpu_disable(void);
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extern void __cpu_die(unsigned int cpu);
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extern void prefill_possible_map(void);
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extern unsigned __cpuinitdata disabled_cpus;
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#define raw_smp_processor_id() read_pda(cpunumber)
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#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
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#define stack_smp_processor_id() \
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({ \
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struct thread_info *ti; \
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__asm__("andq %%rsp,%0; ":"=r" (ti) : "0" (CURRENT_MASK)); \
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ti->cpu; \
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ti->cpu; \
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})
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#endif
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/*
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* On x86 all CPUs are mapped 1:1 to the APIC space. This simplifies
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* scheduling and IPI sending and compresses data structures.
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*/
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static inline int num_booting_cpus(void)
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{
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return cpus_weight(cpu_callout_map);
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}
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extern void smp_send_reschedule(int cpu);
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#else /* CONFIG_SMP */
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extern unsigned int boot_cpu_id;
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#define cpu_physical_id(cpu) boot_cpu_id
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#define stack_smp_processor_id() 0
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#endif /* !CONFIG_SMP */
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#define safe_smp_processor_id() smp_processor_id()
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static __inline int logical_smp_processor_id(void)
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{
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/* we don't want to mark this access volatile - bad code generation */
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return GET_APIC_LOGICAL_ID(*(unsigned long *)(APIC_BASE+APIC_LDR));
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return GET_APIC_LOGICAL_ID(*(u32 *)(APIC_BASE + APIC_LDR));
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}
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static inline int hard_smp_processor_id(void)
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{
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/* we don't want to mark this access volatile - bad code generation */
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return GET_APIC_ID(*(u32 *)(APIC_BASE + APIC_ID));
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}
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#ifdef CONFIG_SMP
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#define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu)
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#else
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extern unsigned int boot_cpu_id;
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#define cpu_physical_id(cpu) boot_cpu_id
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#endif /* !CONFIG_SMP */
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#endif
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#include <asm/mpspec.h>
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#include <linux/bitops.h>
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extern cpumask_t cpu_online_map;
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extern unsigned char cpu_to_node[];
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extern cpumask_t node_to_cpumask[];
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