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ARM: SMP: pass an ipi number to smp_cross_call()
This allows us to use smp_cross_call() to trigger a number of different software generated interrupts, rather than combining them all on one SGI. Recover the SGI number via do_IPI. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -38,7 +38,7 @@ extern void show_ipi_list(struct seq_file *p);
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/*
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* Called from assembly code, this handles an IPI.
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*/
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asmlinkage void do_IPI(struct pt_regs *regs);
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asmlinkage void do_IPI(int ipinr, struct pt_regs *regs);
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/*
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* Setup the set of possible CPUs (via set_cpu_possible)
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@ -53,7 +53,7 @@ extern void smp_store_cpu_info(unsigned int cpuid);
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/*
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* Raise an IPI cross call on CPUs in callmap.
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*/
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extern void smp_cross_call(const struct cpumask *mask);
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extern void smp_cross_call(const struct cpumask *mask, int ipi);
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/*
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* Boot a secondary CPU, and assign it the specified idle task.
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@ -48,7 +48,7 @@
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*/
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ALT_SMP(test_for_ipi r0, r6, r5, lr)
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ALT_UP_B(9997f)
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movne r0, sp
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movne r1, sp
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adrne lr, BSYM(1b)
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bne do_IPI
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@ -404,7 +404,7 @@ static void send_ipi_message(const struct cpumask *mask, enum ipi_msg_type msg)
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/*
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* Call the platform specific cross-CPU call function.
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*/
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smp_cross_call(mask);
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smp_cross_call(mask, 1);
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local_irq_restore(flags);
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}
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@ -537,14 +537,8 @@ static void ipi_cpu_stop(unsigned int cpu)
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/*
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* Main handler for inter-processor interrupts
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*
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* For ARM, the ipimask now only identifies a single
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* category of IPI (Bit 1 IPIs have been replaced by a
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* different mechanism):
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*
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* Bit 0 - Inter-processor function call
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*/
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asmlinkage void __exception do_IPI(struct pt_regs *regs)
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asmlinkage void __exception do_IPI(int ipinr, struct pt_regs *regs)
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{
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unsigned int cpu = smp_processor_id();
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struct ipi_data *ipi = &per_cpu(ipi_data, cpu);
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@ -31,9 +31,9 @@
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#include <asm/hardware/gic.h>
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static inline void smp_cross_call(const struct cpumask *mask)
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static inline void smp_cross_call(const struct cpumask *mask, int ipi)
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{
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gic_raise_softirq(mask, 1);
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gic_raise_softirq(mask, ipi);
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}
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#endif
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@ -76,7 +76,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
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omap_modify_auxcoreboot0(0x200, 0xfffffdff);
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flush_cache_all();
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smp_wmb();
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smp_cross_call(cpumask_of(cpu));
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smp_cross_call(cpumask_of(cpu), 1);
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/*
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* Now the secondary core is starting up let it run its
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@ -7,9 +7,9 @@
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/*
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* We use IRQ1 as the IPI
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*/
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static inline void smp_cross_call(const struct cpumask *mask)
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static inline void smp_cross_call(const struct cpumask *mask, int ipi)
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{
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gic_raise_softirq(mask, 1);
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gic_raise_softirq(mask, ipi);
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}
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#endif
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@ -116,7 +116,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
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* Use smp_cross_call() for this, since there's little
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* point duplicating the code here
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*/
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smp_cross_call(cpumask_of(cpu));
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smp_cross_call(cpumask_of(cpu), 1);
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timeout = jiffies + (1 * HZ);
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while (time_before(jiffies, timeout)) {
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@ -14,9 +14,9 @@ extern void __iomem *gic_cpu_base_addr;
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/*
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* We use IRQ1 as the IPI
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*/
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static inline void smp_cross_call(const struct cpumask *mask)
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static inline void smp_cross_call(const struct cpumask *mask, int ipi)
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{
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gic_raise_softirq(mask, 1);
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gic_raise_softirq(mask, ipi);
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}
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#endif
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@ -97,7 +97,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
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* the boot monitor to read the system wide flags register,
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* and branch to the address found there.
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*/
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smp_cross_call(cpumask_of(cpu));
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smp_cross_call(cpumask_of(cpu), 1);
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timeout = jiffies + (1 * HZ);
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while (time_before(jiffies, timeout)) {
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@ -7,9 +7,9 @@
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/*
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* We use IRQ1 as the IPI
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*/
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static inline void smp_cross_call(const struct cpumask *mask)
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static inline void smp_cross_call(const struct cpumask *mask, int ipi)
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{
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gic_raise_softirq(mask, 1);
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gic_raise_softirq(mask, ipi);
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}
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#endif
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@ -18,8 +18,8 @@ extern void u8500_secondary_startup(void);
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/*
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* We use IRQ1 as the IPI
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*/
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static inline void smp_cross_call(const struct cpumask *mask)
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static inline void smp_cross_call(const struct cpumask *mask, int ipi)
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{
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gic_raise_softirq(mask, 1);
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gic_raise_softirq(mask, ipi);
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}
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#endif
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@ -78,7 +78,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
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__cpuc_flush_dcache_area((void *)&pen_release, sizeof(pen_release));
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outer_clean_range(__pa(&pen_release), __pa(&pen_release) + 1);
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smp_cross_call(cpumask_of(cpu));
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smp_cross_call(cpumask_of(cpu), 1);
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timeout = jiffies + (1 * HZ);
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while (time_before(jiffies, timeout)) {
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@ -7,8 +7,8 @@
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/*
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* We use IRQ1 as the IPI
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*/
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static inline void smp_cross_call(const struct cpumask *mask)
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static inline void smp_cross_call(const struct cpumask *mask, int ipi)
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{
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gic_raise_softirq(mask, 1);
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gic_raise_softirq(mask, ipi);
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}
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#endif
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@ -92,7 +92,7 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
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* the boot monitor to read the system wide flags register,
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* and branch to the address found there.
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*/
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smp_cross_call(cpumask_of(cpu));
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smp_cross_call(cpumask_of(cpu), 1);
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timeout = jiffies + (1 * HZ);
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while (time_before(jiffies, timeout)) {
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@ -29,9 +29,9 @@ extern u32 omap_read_auxcoreboot0(void);
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/*
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* We use Soft IRQ1 as the IPI
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*/
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static inline void smp_cross_call(const struct cpumask *mask)
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static inline void smp_cross_call(const struct cpumask *mask, int ipi)
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{
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gic_raise_softirq(mask, 1);
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gic_raise_softirq(mask, ipi);
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}
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#endif
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