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tools/power turbostat: indicate SMX and SGX support
SGX presence is related to a SKL power workaround, so lets show when that is enabled. Signed-off-by: Len Brown <len.brown@intel.com>
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@ -3052,6 +3052,17 @@ guess:
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return 0;
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}
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void decode_feature_control_msr(void)
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{
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unsigned long long msr;
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if (!get_msr(base_cpu, MSR_IA32_FEATURE_CONTROL, &msr))
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fprintf(outf, "cpu%d: MSR_IA32_FEATURE_CONTROL: 0x%08llx (%sLocked %s)\n",
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base_cpu, msr,
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msr & FEATURE_CONTROL_LOCKED ? "" : "UN-",
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msr & (1 << 18) ? "SGX" : "");
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}
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void decode_misc_enable_msr(void)
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{
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unsigned long long msr;
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@ -3111,9 +3122,10 @@ void process_cpuid()
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if (debug) {
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fprintf(outf, "%d CPUID levels; family:model:stepping 0x%x:%x:%x (%d:%d:%d)\n",
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max_level, family, model, stepping, family, model, stepping);
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fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s\n",
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fprintf(outf, "CPUID(1): %s %s %s %s %s %s %s %s %s\n",
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ecx & (1 << 0) ? "SSE3" : "-",
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ecx & (1 << 3) ? "MONITOR" : "-",
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ecx & (1 << 6) ? "SMX" : "-",
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ecx & (1 << 7) ? "EIST" : "-",
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ecx & (1 << 8) ? "TM2" : "-",
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edx & (1 << 4) ? "TSC" : "-",
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@ -3175,6 +3187,20 @@ void process_cpuid()
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if (debug)
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decode_misc_enable_msr();
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if (max_level >= 0x7) {
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int has_sgx;
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ecx = 0;
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__cpuid_count(0x7, 0, eax, ebx, ecx, edx);
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has_sgx = ebx & (1 << 2);
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fprintf(outf, "CPUID(7): %sSGX\n", has_sgx ? "" : "No-");
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if (has_sgx)
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decode_feature_control_msr();
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}
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if (max_level >= 0x15) {
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unsigned int eax_crystal;
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unsigned int ebx_tsc;
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