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x86: cleanup C1E enabled detection
Rename the "MSR_K8_ENABLE_C1E" MSR to INT_PENDING_MSG, which is the name in the data sheet as well. Move the C1E mask to the header file. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -25,7 +25,6 @@ extern void vide(void);
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__asm__(".align 4\nvide: ret");
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__asm__(".align 4\nvide: ret");
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#ifdef CONFIG_X86_LOCAL_APIC
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#ifdef CONFIG_X86_LOCAL_APIC
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#define ENABLE_C1E_MASK 0x18000000
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#define CPUID_PROCESSOR_SIGNATURE 1
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#define CPUID_PROCESSOR_SIGNATURE 1
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#define CPUID_XFAM 0x0ff00000
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#define CPUID_XFAM 0x0ff00000
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#define CPUID_XFAM_K8 0x00000000
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#define CPUID_XFAM_K8 0x00000000
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@ -45,8 +44,8 @@ static __cpuinit int amd_apic_timer_broken(void)
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break;
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break;
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case CPUID_XFAM_10H:
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case CPUID_XFAM_10H:
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case CPUID_XFAM_11H:
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case CPUID_XFAM_11H:
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rdmsr(MSR_K8_ENABLE_C1E, lo, hi);
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rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
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if (lo & ENABLE_C1E_MASK) {
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if (lo & K8_INTP_C1E_ACTIVE_MASK) {
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if (smp_processor_id() != boot_cpu_physical_apicid)
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if (smp_processor_id() != boot_cpu_physical_apicid)
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printk(KERN_INFO "AMD C1E detected late. "
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printk(KERN_INFO "AMD C1E detected late. "
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" Force timer broadcast.\n");
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" Force timer broadcast.\n");
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@ -110,7 +110,6 @@ static void __cpuinit early_init_amd_mc(struct cpuinfo_x86 *c)
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#endif
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#endif
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}
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}
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#define ENABLE_C1E_MASK 0x18000000
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#define CPUID_PROCESSOR_SIGNATURE 1
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#define CPUID_PROCESSOR_SIGNATURE 1
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#define CPUID_XFAM 0x0ff00000
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#define CPUID_XFAM 0x0ff00000
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#define CPUID_XFAM_K8 0x00000000
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#define CPUID_XFAM_K8 0x00000000
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@ -130,8 +129,8 @@ static __cpuinit int amd_apic_timer_broken(void)
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break;
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break;
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case CPUID_XFAM_10H:
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case CPUID_XFAM_10H:
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case CPUID_XFAM_11H:
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case CPUID_XFAM_11H:
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rdmsr(MSR_K8_ENABLE_C1E, lo, hi);
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rdmsr(MSR_K8_INT_PENDING_MSG, lo, hi);
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if (lo & ENABLE_C1E_MASK)
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if (lo & K8_INTP_C1E_ACTIVE_MASK)
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return 1;
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return 1;
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break;
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break;
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default:
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default:
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@ -111,7 +111,9 @@
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#define MSR_K8_TOP_MEM2 0xc001001d
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#define MSR_K8_TOP_MEM2 0xc001001d
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#define MSR_K8_SYSCFG 0xc0010010
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#define MSR_K8_SYSCFG 0xc0010010
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#define MSR_K8_HWCR 0xc0010015
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#define MSR_K8_HWCR 0xc0010015
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#define MSR_K8_ENABLE_C1E 0xc0010055
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#define MSR_K8_INT_PENDING_MSG 0xc0010055
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/* C1E active bits in int pending message */
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#define K8_INTP_C1E_ACTIVE_MASK 0x18000000
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#define MSR_K8_TSEG_ADDR 0xc0010112
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#define MSR_K8_TSEG_ADDR 0xc0010112
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#define K8_MTRRFIXRANGE_DRAM_ENABLE 0x00040000 /* MtrrFixDramEn bit */
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#define K8_MTRRFIXRANGE_DRAM_ENABLE 0x00040000 /* MtrrFixDramEn bit */
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#define K8_MTRRFIXRANGE_DRAM_MODIFY 0x00080000 /* MtrrFixDramModEn bit */
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#define K8_MTRRFIXRANGE_DRAM_MODIFY 0x00080000 /* MtrrFixDramModEn bit */
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