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powerpc/85xx: Fix typo in code comment

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s/singals/signals/

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/20231124100241.660374-1-dario.binacchi@amarulasolutions.com
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Dario Binacchi 2023-11-24 11:02:37 +01:00 committed by Michael Ellerman
parent e12d8e2602
commit a9e1e4d6e8
1 changed files with 1 additions and 1 deletions
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arch/powerpc/platforms/85xx/mpc85xx_rdb.c
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@ -76,7 +76,7 @@ static void __init mpc85xx_rdb_setup_arch(void)
/* P1025 has pins muxed for QE and other functions. To
* enable QE UEC mode, we need to set bit QE0 for UCC1
* in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
* and QE12 for QE MII management singals in PMUXCR
* and QE12 for QE MII management signals in PMUXCR
* register.
*/
setbits32(&guts->pmuxcr, MPC85xx_PMUXCR_QE(0) |