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mmc: core: Adjust and reuse the macro of R1_STATUS(x)
R1_STATUS(x) now is only used by ioctl_rpmb_card_status_poll(), which checks all bits as possible. But according to the spec, bit 17 and bit 18 should be ignored, as well bit 14 which is reserved(must be set to 0) quoting from the spec and these rule apply to all places checking the device status. So change its checking from 0xFFFFE000 to 0xFFF9A000. As a bonus, we reuse it for mmc_do_erase() as well as mmc_switch_status_error(). (1) Currently mmc_switch_status_error() doesn't check bit 25, but it means device is locked but not unlocked by CMD42 prior to any operations which need check busy, which is also not allowed. (2) mmc_do_erase() also forgot to to check bit 15, WP_ERASE_SKIP. The spec says "Only partial address space was erased due to existing write protected blocks.", which obviously means we should fail this I/O. Otherwise, the partial erased data stored in nonvalatile flash violates the data integrity from the view of I/O owner, which probably confuse it when further used. So reusing R1_STATUS for them not only improve the readability but also slove real problems. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -2078,7 +2078,7 @@ static int mmc_do_erase(struct mmc_card *card, unsigned int from,
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cmd.flags = MMC_RSP_R1 | MMC_CMD_AC;
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/* Do not retry else we can't see errors */
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err = mmc_wait_for_cmd(card->host, &cmd, 0);
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if (err || (cmd.resp[0] & 0xFDF92000)) {
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if (err || R1_STATUS(cmd.resp[0])) {
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pr_err("error %d requesting status %#x\n",
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err, cmd.resp[0]);
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err = -EIO;
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@ -417,7 +417,7 @@ static int mmc_switch_status_error(struct mmc_host *host, u32 status)
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if (status & R1_SPI_ILLEGAL_COMMAND)
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return -EBADMSG;
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} else {
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if (status & 0xFDFFA000)
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if (R1_STATUS(status))
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pr_warn("%s: unexpected status %#x after switch\n",
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mmc_hostname(host), status);
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if (status & R1_SWITCH_ERROR)
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@ -144,7 +144,7 @@ static inline bool mmc_op_multi(u32 opcode)
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#define R1_WP_ERASE_SKIP (1 << 15) /* sx, c */
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#define R1_CARD_ECC_DISABLED (1 << 14) /* sx, a */
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#define R1_ERASE_RESET (1 << 13) /* sr, c */
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#define R1_STATUS(x) (x & 0xFFFFE000)
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#define R1_STATUS(x) (x & 0xFFF9A000)
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#define R1_CURRENT_STATE(x) ((x & 0x00001E00) >> 9) /* sx, b (4 bits) */
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#define R1_READY_FOR_DATA (1 << 8) /* sx, a */
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#define R1_SWITCH_ERROR (1 << 7) /* sx, c */
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