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powerpc fixes for 5.2 #5
Seven fixes, all for bugs introduced this cycle. The commit to add KASAN support broke booting on 32-bit SMP machines, due to a refactoring that moved some setup out of the secondary CPU path. A fix for another 32-bit SMP bug introduced by the fast syscall entry implementation for 32-bit BOOKE. And a build fix for the same commit. Our change to allow the DAWR to be force enabled on Power9 introduced a bug in KVM, where we clobber r3 leading to a host crash. The same commit also exposed a previously unreachable bug in the nested KVM handling of DAWR, which could lead to an oops in a nested host. One of the DMA reworks broke the b43legacy WiFi driver on some people's powermacs, fix it by enabling a 30-bit ZONE_DMA on 32-bit. A fix for TLB flushing in KVM introduced a new bug, as it neglected to also flush the ERAT, this could lead to memory corruption in the guest. Thanks to: Aaro Koskinen, Christoph Hellwig, Christophe Leroy, Larry Finger, Michael Neuling, Suraj Jitindar Singh. -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJdDg4YAAoJEFHr6jzI4aWACKYP/RG1cqYDjEWz0N9bxjAOanx6 z//hPZqZrObEORx0mek07LNj6JDy4eL7CB9WaEudJjHt7mYugLYq0g7hUMVvBWnB irFEuzGJ8EgWl1aMbmz+fgf49PBIuroy2o/4pyzzQXoDaw44QyUaCke2VEBskQNG RW64C2rDVrPgpRHzBB9EZVNv7svmo6ERJsEpRvqP3PZG1ZxgXW+DXbEdSmJCcgAt 8oI+z6frRv+0ez+nge7TULo8DuheShfxc7l0jFrd48i35v2qB/IowPr8cof9fRwM TqnB+3dZXHPKPz6J9mz80p9ZDe1omLzg6i9EiR2/7a3XGpRBo7kCg3Iri7N5pu0j LotK9l1+mXWLy5P6lOHH5/tEHv52Wqsvh5IetpNJ2tgXp3MzbOc1/Ut9h7Ag7cRw WRa7tNXQ5Ud8uPM1Pds8Ymhd+/nZ9RItjGcu6S095/OGpM1FJR9a0QnfUHMyfyuX kAGrJDWcAkCd/Q9tKHsQotuZAFmRCQe4JFkzTiGzwdjYWYgtTA1c/eIv3+SG7eLV 1dsaIYzIS56b+Qz2Qc/pKHwho+I9o505Y7LFXxlCGXDDjyI72ioTQDwiSBzaZdc9 ORwNchLfpXNpiNXRoRqAnqmhWxavYmA6oJ13RDBiMBxIUWHynVbEzLlX9fPNdBFj Kw3Zd15znokXBzU+1mDE =Ju1y -----END PGP SIGNATURE----- Merge tag 'powerpc-5.2-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fixes from Michael Ellerman: "This is a frustratingly large batch at rc5. Some of these were sent earlier but were missed by me due to being distracted by other things, and some took a while to track down due to needing manual bisection on old hardware. But still we clearly need to improve our testing of KVM, and of 32-bit, so that we catch these earlier. Summary: seven fixes, all for bugs introduced this cycle. - The commit to add KASAN support broke booting on 32-bit SMP machines, due to a refactoring that moved some setup out of the secondary CPU path. - A fix for another 32-bit SMP bug introduced by the fast syscall entry implementation for 32-bit BOOKE. And a build fix for the same commit. - Our change to allow the DAWR to be force enabled on Power9 introduced a bug in KVM, where we clobber r3 leading to a host crash. - The same commit also exposed a previously unreachable bug in the nested KVM handling of DAWR, which could lead to an oops in a nested host. - One of the DMA reworks broke the b43legacy WiFi driver on some people's powermacs, fix it by enabling a 30-bit ZONE_DMA on 32-bit. - A fix for TLB flushing in KVM introduced a new bug, as it neglected to also flush the ERAT, this could lead to memory corruption in the guest. Thanks to: Aaro Koskinen, Christoph Hellwig, Christophe Leroy, Larry Finger, Michael Neuling, Suraj Jitindar Singh" * tag 'powerpc-5.2-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: KVM: PPC: Book3S HV: Invalidate ERAT when flushing guest TLB entries powerpc: enable a 30-bit ZONE_DMA for 32-bit pmac KVM: PPC: Book3S HV: Only write DAWR[X] when handling h_set_dawr in real mode KVM: PPC: Book3S HV: Fix r3 corruption in h_set_dabr() powerpc/32: fix build failure on book3e with KVM powerpc/booke: fix fast syscall entry on SMP powerpc/32s: fix initial setup of segment registers on secondary CPU
This commit is contained in:
commit
a8282bf087
@ -319,6 +319,13 @@ struct vm_area_struct;
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#endif /* __ASSEMBLY__ */
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#include <asm/slice.h>
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/*
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* Allow 30-bit DMA for very limited Broadcom wifi chips on many powerbooks.
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*/
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#ifdef CONFIG_PPC32
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#define ARCH_ZONE_DMA_BITS 30
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#else
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#define ARCH_ZONE_DMA_BITS 31
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#endif
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#endif /* _ASM_POWERPC_PAGE_H */
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@ -752,6 +752,7 @@ __secondary_start:
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stw r0,0(r3)
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/* load up the MMU */
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bl load_segment_registers
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bl load_up_mmu
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/* ptr to phys current thread */
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@ -83,7 +83,7 @@ END_BTB_FLUSH_SECTION
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SAVE_4GPRS(3, r11); \
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SAVE_2GPRS(7, r11)
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.macro SYSCALL_ENTRY trapno intno
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.macro SYSCALL_ENTRY trapno intno srr1
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mfspr r10, SPRN_SPRG_THREAD
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#ifdef CONFIG_KVM_BOOKE_HV
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BEGIN_FTR_SECTION
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@ -94,7 +94,7 @@ BEGIN_FTR_SECTION
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mfspr r11, SPRN_SRR1
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mtocrf 0x80, r11 /* check MSR[GS] without clobbering reg */
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bf 3, 1975f
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b kvmppc_handler_BOOKE_INTERRUPT_\intno\()_SPRN_SRR1
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b kvmppc_handler_\intno\()_\srr1
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1975:
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mr r12, r13
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lwz r13, THREAD_NORMSAVE(2)(r10)
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@ -145,9 +145,9 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
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tophys(r11,r11)
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addi r11,r11,global_dbcr0@l
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#ifdef CONFIG_SMP
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lwz r9,TASK_CPU(r2)
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slwi r9,r9,3
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add r11,r11,r9
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lwz r10, TASK_CPU(r2)
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slwi r10, r10, 3
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add r11, r11, r10
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#endif
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lwz r12,0(r11)
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mtspr SPRN_DBCR0,r12
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@ -409,7 +409,7 @@ interrupt_base:
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/* System Call Interrupt */
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START_EXCEPTION(SystemCall)
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SYSCALL_ENTRY 0xc00 SYSCALL
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SYSCALL_ENTRY 0xc00 BOOKE_INTERRUPT_SYSCALL SPRN_SRR1
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/* Auxiliary Processor Unavailable Interrupt */
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EXCEPTION(0x2900, AP_UNAVAIL, AuxillaryProcessorUnavailable, \
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@ -830,6 +830,7 @@ static void flush_guest_tlb(struct kvm *kvm)
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}
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}
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asm volatile("ptesync": : :"memory");
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asm volatile(PPC_INVALIDATE_ERAT : : :"memory");
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}
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void kvmppc_check_need_tlb_flush(struct kvm *kvm, int pcpu,
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@ -2500,17 +2500,28 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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LOAD_REG_ADDR(r11, dawr_force_enable)
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lbz r11, 0(r11)
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cmpdi r11, 0
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bne 3f
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li r3, H_HARDWARE
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beqlr
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blr
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3:
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/* Emulate H_SET_DABR/X on P8 for the sake of compat mode guests */
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rlwimi r5, r4, 5, DAWRX_DR | DAWRX_DW
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rlwimi r5, r4, 2, DAWRX_WT
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clrrdi r4, r4, 3
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std r4, VCPU_DAWR(r3)
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std r5, VCPU_DAWRX(r3)
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/*
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* If came in through the real mode hcall handler then it is necessary
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* to write the registers since the return path won't. Otherwise it is
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* sufficient to store then in the vcpu struct as they will be loaded
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* next time the vcpu is run.
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*/
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mfmsr r6
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andi. r6, r6, MSR_DR /* in real mode? */
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bne 4f
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mtspr SPRN_DAWR, r4
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mtspr SPRN_DAWRX, r5
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li r3, 0
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4: li r3, 0
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blr
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_GLOBAL(kvmppc_h_cede) /* r3 = vcpu pointer, r11 = msr, r13 = paca */
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@ -248,7 +248,8 @@ void __init paging_init(void)
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(long int)((top_of_ram - total_ram) >> 20));
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#ifdef CONFIG_ZONE_DMA
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max_zone_pfns[ZONE_DMA] = min(max_low_pfn, 0x7fffffffUL >> PAGE_SHIFT);
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max_zone_pfns[ZONE_DMA] = min(max_low_pfn,
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((1UL << ARCH_ZONE_DMA_BITS) - 1) >> PAGE_SHIFT);
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#endif
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max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
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#ifdef CONFIG_HIGHMEM
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@ -7,6 +7,7 @@ config PPC_PMAC
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select PPC_INDIRECT_PCI if PPC32
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select PPC_MPC106 if PPC32
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select PPC_NATIVE
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select ZONE_DMA if PPC32
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default y
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config PPC_PMAC64
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