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dt-bindings: Fix various typos
Corrected several typos in Documentation/devicetree/bindings files. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Kuan-Wei Chiu <visitorckw@gmail.com> Reviewed-by: Matti Vaittinen <mazziesaccount@gmail.com> Signed-off-by: Yu-Chun Lin <eleanor15x@gmail.com> Link: https://lore.kernel.org/r/20240905151943.2792056-1-eleanor15x@gmail.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
This commit is contained in:
Yu-Chun Lin
Rob Herring (Arm)
parent
1a52a094c2
commit
a7fcc23274
@ -17,7 +17,7 @@ description: |
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The Coresight dummy source component is for the specific coresight source
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devices kernel don't have permission to access or configure. For some SOCs,
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there would be Coresight source trace components on sub-processor which
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are conneted to AP processor via debug bus. For these devices, a dummy driver
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are connected to AP processor via debug bus. For these devices, a dummy driver
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is needed to register them as Coresight source devices, so that paths can be
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created in the driver. It provides Coresight API for operations on dummy
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source devices, such as enabling and disabling them. It also provides the
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@ -385,7 +385,7 @@ patternProperties:
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This property is required in idle state nodes of device tree meant
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for RISC-V systems. For more details on the suspend_type parameter
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refer the SBI specifiation v0.3 (or higher) [7].
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refer the SBI specification v0.3 (or higher) [7].
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local-timer-stop:
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description:
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@ -16,7 +16,7 @@ maintainers:
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description:
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This binding extends the data mapping defined in lvds-data-mapping.yaml.
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It supports reversing the bit order on the formats defined there in order
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to accomodate for even more specialized data formats, since a variety of
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to accommodate for even more specialized data formats, since a variety of
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data formats and layouts is used to drive LVDS displays.
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properties:
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@ -20,7 +20,7 @@ Optional properties:
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memcpy channels in eDMA.
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Notes:
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When requesting channel via ti,dra7-dma-crossbar, the DMA clinet must request
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When requesting channel via ti,dra7-dma-crossbar, the DMA client must request
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the DMA event number as crossbar ID (input to the DMA crossbar).
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For ti,am335x-edma-crossbar: the meaning of parameters of dmas for clients:
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@ -36,7 +36,7 @@ Optional properties for all bus drivers:
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- st,irq{1,2}-disable: disable IRQ 1/2
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- st,irq{1,2}-ff-wu-1: raise IRQ 1/2 on FF_WU_1 condition
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- st,irq{1,2}-ff-wu-2: raise IRQ 1/2 on FF_WU_2 condition
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- st,irq{1,2}-data-ready: raise IRQ 1/2 on data ready contition
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- st,irq{1,2}-data-ready: raise IRQ 1/2 on data ready condition
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- st,irq{1,2}-click: raise IRQ 1/2 on click condition
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- st,irq-open-drain: consider IRQ lines open-drain
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- st,irq-active-low: make IRQ lines active low
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@ -60,7 +60,7 @@ properties:
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The 4th cell is a phandle to a node describing a set of CPUs this
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interrupt is affine to. The interrupt must be a PPI, and the node
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pointed must be a subnode of the "ppi-partitions" subnode. For
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interrupt types other than PPI or PPIs that are not partitionned,
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interrupt types other than PPI or PPIs that are not partitioned,
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this cell must be zero. See the "ppi-partitions" node description
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below.
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@ -66,7 +66,7 @@ patternProperties:
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IMAXled = 160000 * (592 / 600.5) * (1 / max-current-switch-number)
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And the minimum output current formula:
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IMINled = 3300 * (592 / 600.5) * (1 / max-current-switch-number)
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where max-current-switch-number is determinated by led configuration
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where max-current-switch-number is determined by led configuration
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and depends on how leds are physically connected to the led driver.
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allOf:
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@ -24,7 +24,7 @@ Required properties:
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number of completion messages for which FlexRM will inject
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one MSI interrupt to CPU.
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The 3nd cell contains MSI timer value representing time for
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The 3rd cell contains MSI timer value representing time for
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which FlexRM will wait to accumulate N completion messages
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where N is the value specified by 2nd cell above. If FlexRM
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does not get required number of completion messages in time
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@ -16,7 +16,7 @@ description:
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can be connected to CMOS image sensors from various vendors, supporting both
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MIPI CSI-2 and parallel interfaces. It can also output on either MIPI CSI-2
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or parallel. The hardware is capable of transmitting and receiving MIPI
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interlaved data strams with data types or multiple virtual channel
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interleaved data streams with data types or multiple virtual channel
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identifiers.
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allOf:
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@ -77,7 +77,7 @@ properties:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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maxItems: 2
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description: |
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An array specyfing minimum image size in pixels at the FIMC input and
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An array specifying minimum image size in pixels at the FIMC input and
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output DMA, in the first and second cell respectively. Default value
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is <16 16>.
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@ -25,7 +25,7 @@ properties:
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description:
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The PMIC provides intb and errb IRQ lines. The errb IRQ line is used
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for fatal IRQs which will cause the PMIC to shut down power outputs.
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In many systems this will shut down the SoC contolling the PMIC and
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In many systems this will shut down the SoC controlling the PMIC and
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connecting/handling the errb can be omitted. However, there are cases
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where the SoC is not powered by the PMIC or has a short time backup
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energy to handle shutdown of critical hardware. In that case it may be
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@ -53,7 +53,7 @@ properties:
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samsung,s2mps11-wrstbi-ground:
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description: |
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Indicates that WRSTBI pin of PMIC is pulled down. When the system is
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suspended it will always go down thus triggerring unwanted buck warm
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suspended it will always go down thus triggering unwanted buck warm
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reset (setting buck voltages to default values).
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type: boolean
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@ -2,7 +2,7 @@ Texas Instruments TWL6040 family
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The TWL6040s are 8-channel high quality low-power audio codecs providing audio,
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vibra and GPO functionality on OMAP4+ platforms.
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They are connected ot the host processor via i2c for commands, McPDM for audio
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They are connected to the host processor via i2c for commands, McPDM for audio
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data and commands.
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Required properties:
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@ -72,7 +72,7 @@ properties:
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description: VDD_RFA_CMN supply regulator handle
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vddrfa0p8-supply:
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description: VDD_RFA_0P8 suppply regulator handle
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description: VDD_RFA_0P8 supply regulator handle
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vddrfa1p7-supply:
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description: VDD_RFA_1P7 supply regulator handle
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@ -36,7 +36,7 @@ Optional properties:
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3-tuple setting for each (up to 3) supported link
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speed on the host. Range is 0 to 273000 in unit of
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uV. Default is 0.
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- apm,tx-pre-cursor2 : 2st pre-cursor emphasis taps control. Two set of
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- apm,tx-pre-cursor2 : 2nd pre-cursor emphasis taps control. Two set of
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3-tuple setting for each (up to 3) supported link
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speed on the host. Range is 0 to 127400 in unit uV.
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Default is 0x0.
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@ -41,7 +41,7 @@ properties:
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description:
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One instance of the T-PHY on MT7988 suffers from a performance
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problem in 10GBase-R mode which needs a work-around in the driver.
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This flag enables a work-around ajusting an analog phy setting and
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This flag enables a work-around adjusting an analog phy setting and
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is required for XFI Port0 of the MT7988 SoC to be in compliance with
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the SFP specification.
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@ -240,7 +240,7 @@ patternProperties:
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The force mode is used to manually switch the shared phy mode between
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USB3 and PCIe, when USB3 phy type is selected by the consumer, and
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force-mode is set, will cause phy's power and pipe toggled and force
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phy as USB3 mode which switched from default PCIe mode. But perfer to
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phy as USB3 mode which switched from default PCIe mode. But prefer to
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use the property "mediatek,syscon-type" for newer SoCs that support it.
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type: boolean
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@ -43,7 +43,7 @@ properties:
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qcom,tune-usb2-amplitude:
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$ref: /schemas/types.yaml#/definitions/uint8
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description: High-Speed trasmit amplitude
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description: High-Speed transmit amplitude
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minimum: 0
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maximum: 15
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default: 8
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@ -11,7 +11,7 @@ maintainers:
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- Alexandre TORGUE <alexandre.torgue@foss.st.com>
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description: |
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STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware
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STMicroelectronics's STM32 MCUs integrate a GPIO and Pin mux/config hardware
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controller. It controls the input/output settings on the available pins and
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also provides ability to multiplex and configure the output of various
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on-chip controllers onto these pads.
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@ -164,7 +164,7 @@ patternProperties:
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This macro is available here:
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- include/dt-bindings/pinctrl/stm32-pinfunc.h
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Some examples of using macro:
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/* GPIO A9 set as alernate function 2 */
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/* GPIO A9 set as alternate function 2 */
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... {
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pinmux = <STM32_PINMUX('A', 9, AF2)>;
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};
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@ -93,7 +93,7 @@ patternProperties:
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Each SCP core has own cache memory. The SRAM and L1TCM are shared by
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cores. The power of cache, SRAM and L1TCM power should be enabled
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before booting SCP cores. The size of cache, SRAM, and L1TCM are varied
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on differnt SoCs.
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on different SoCs.
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The SCP cores do not use an MMU, but has a set of registers to
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control the translations between 32-bit CPU addresses into system bus
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@ -78,7 +78,7 @@ properties:
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we use nvidia,adjust-baud-rates.
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As an example, consider there is deviation observed in TX for baud rates as listed below. 0
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to 9600 has 1% deviation 9600 to 115200 2% deviation. This slight deviation is expcted and
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to 9600 has 1% deviation 9600 to 115200 2% deviation. This slight deviation is expected and
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Tegra UART is expected to handle it. Due to the issue stated above, baud rate on Tegra UART
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should be set equal to or above deviation observed for avoiding frame errors. Property
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should be set like this:
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@ -32,7 +32,7 @@ properties:
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description: |
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just the value of reg 57. Bit(3) decides whether the jack polarity is inverted.
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Bit(2) decides whether the button on the headset is inverted.
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Bit(1)/(0) decides the mic properity to be OMTP/CTIA or auto.
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Bit(1)/(0) decides the mic property to be OMTP/CTIA or auto.
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minimum: 0x00
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maximum: 0x0f
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default: 0x0f
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@ -77,7 +77,7 @@ Optional properties:
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- st,odd-pwm-speed-mode:
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If present, PWM speed mode run on odd speed mode (341.3 kHz) on all
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channels. If not present, normal PWM spped mode (384 kHz) will be used.
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channels. If not present, normal PWM speed mode (384 kHz) will be used.
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- st,distortion-compensation:
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If present, distortion compensation variable uses DCC coefficient.
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@ -310,7 +310,7 @@ examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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// Example 1 (new calbiration data: for pre v1 IP):
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// Example 1 (new calibration data: for pre v1 IP):
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thermal-sensor@4a9000 {
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compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
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reg = <0x4a9000 0x1000>, /* TM */
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