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just two driver fixes
-----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEOZGx6rniZ1Gk92RdFA3kzBSgKbYFAmQ6bX0ACgkQFA3kzBSg KbYlYQ/+P0P4a7zLcWYD+7W4KPrCpG3Bu3IkFfOAmwrkEu+KqBrnLnELS1pfkMkT clmcHPeZQ8AzTIgIPPvRIV3OJlTWpZZ6RJXGqegj8oioM4E68ikW1AEtwOKOUuAH bpFJv3sG67adxbzRVUFdfpLcAHsCS4T9C9KhQJGiIsFPKX0GHrC/1fma9PRV2Sei IdMIl2O9ttIvRxaDagc4aodIfVgY2/Y4qn6hw8DC+uyLSWHbsV3Z+Mi8jl1TBBT4 O0Rt/wJq+COGwA5oCKQUkzIyrZ2cOfAh7+yxU+7LxOcD8f3QRS8VQo2Ycad8/KC7 d1JpGP1JizV8LOC0JV4LPfKJ0FeA4RIK0X7T3GgY0EUTf7MKCVmqBkFQZEiWU5mc gCSAUBRC/gavj9L8ljo3Njh0oZZXLDbonWeW3v37jk+A59Y+JSVVLHOvjMXTxHh8 zwv4WkXzPeowS9osbI5KTS35xuSenFjHn7iEKco+Ff+L2xwqT0aYl3WCbQKUuxwD NmKb6OyJC+DoxyP9N9VRLjmqW3mP1Qw9iCNdyH6B0HE7AigthOC3RbJzVH2vsSLn yN9mdTE65D4Xp45wK6kEzNw1Y6SkZwc2xKqLTffKF5r1MkRNbY2XQqDvkFnIpLz5 dcuRXfyzuvERwBnPJdAkMZP8t6kTTg0O1e+DIhxhqGIwM/H5Eoc= =uX1g -----END PGP SIGNATURE----- Merge tag 'i2c-for-6.3-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c fixes from Wolfram Sang: "Just two driver fixes" * tag 'i2c-for-6.3-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: i2c: ocores: generate stop condition after timeout in polling mode i2c: mchp-pci1xxxx: Update Timing registers
This commit is contained in:
commit
a7a55e27ad
@ -48,9 +48,9 @@
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* SR_HOLD_TIME_XK_TICKS field will indicate the number of ticks of the
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* baud clock required to program 'Hold Time' at X KHz.
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*/
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#define SR_HOLD_TIME_100K_TICKS 133
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#define SR_HOLD_TIME_400K_TICKS 20
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#define SR_HOLD_TIME_1000K_TICKS 11
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#define SR_HOLD_TIME_100K_TICKS 150
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#define SR_HOLD_TIME_400K_TICKS 20
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#define SR_HOLD_TIME_1000K_TICKS 12
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#define SMB_CORE_COMPLETION_REG_OFF3 (SMBUS_MAST_CORE_ADDR_BASE + 0x23)
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@ -65,17 +65,17 @@
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* the baud clock required to program 'fair idle delay' at X KHz. Fair idle
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* delay establishes the MCTP T(IDLE_DELAY) period.
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*/
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#define FAIR_BUS_IDLE_MIN_100K_TICKS 969
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#define FAIR_BUS_IDLE_MIN_400K_TICKS 157
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#define FAIR_BUS_IDLE_MIN_1000K_TICKS 157
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#define FAIR_BUS_IDLE_MIN_100K_TICKS 992
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#define FAIR_BUS_IDLE_MIN_400K_TICKS 500
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#define FAIR_BUS_IDLE_MIN_1000K_TICKS 500
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/*
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* FAIR_IDLE_DELAY_XK_TICKS field will indicate the number of ticks of the
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* baud clock required to satisfy the fairness protocol at X KHz.
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*/
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#define FAIR_IDLE_DELAY_100K_TICKS 1000
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#define FAIR_IDLE_DELAY_400K_TICKS 500
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#define FAIR_IDLE_DELAY_1000K_TICKS 500
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#define FAIR_IDLE_DELAY_100K_TICKS 963
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#define FAIR_IDLE_DELAY_400K_TICKS 156
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#define FAIR_IDLE_DELAY_1000K_TICKS 156
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#define SMB_IDLE_SCALING_100K \
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((FAIR_IDLE_DELAY_100K_TICKS << 16) | FAIR_BUS_IDLE_MIN_100K_TICKS)
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@ -105,7 +105,7 @@
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*/
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#define BUS_CLK_100K_LOW_PERIOD_TICKS 156
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#define BUS_CLK_400K_LOW_PERIOD_TICKS 41
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#define BUS_CLK_1000K_LOW_PERIOD_TICKS 15
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#define BUS_CLK_1000K_LOW_PERIOD_TICKS 15
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/*
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* BUS_CLK_XK_HIGH_PERIOD_TICKS field defines the number of I2C Baud Clock
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@ -131,7 +131,7 @@
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*/
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#define CLK_SYNC_100K 4
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#define CLK_SYNC_400K 4
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#define CLK_SYNC_1000K 4
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#define CLK_SYNC_1000K 4
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#define SMB_CORE_DATA_TIMING_REG_OFF (SMBUS_MAST_CORE_ADDR_BASE + 0x40)
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@ -142,25 +142,25 @@
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* determines the SCLK hold time following SDAT driven low during the first
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* START bit in a transfer.
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*/
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#define FIRST_START_HOLD_100K_TICKS 22
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#define FIRST_START_HOLD_400K_TICKS 16
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#define FIRST_START_HOLD_1000K_TICKS 6
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#define FIRST_START_HOLD_100K_TICKS 23
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#define FIRST_START_HOLD_400K_TICKS 8
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#define FIRST_START_HOLD_1000K_TICKS 12
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/*
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* STOP_SETUP_XK_TICKS will indicate the number of ticks of the baud clock
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* required to program 'STOP_SETUP' timer at X KHz. This timer determines the
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* SDAT setup time from the rising edge of SCLK for a STOP condition.
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*/
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#define STOP_SETUP_100K_TICKS 157
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#define STOP_SETUP_100K_TICKS 150
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#define STOP_SETUP_400K_TICKS 20
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#define STOP_SETUP_1000K_TICKS 12
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#define STOP_SETUP_1000K_TICKS 12
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/*
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* RESTART_SETUP_XK_TICKS will indicate the number of ticks of the baud clock
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* required to program 'RESTART_SETUP' timer at X KHz. This timer determines the
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* SDAT setup time from the rising edge of SCLK for a repeated START condition.
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*/
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#define RESTART_SETUP_100K_TICKS 157
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#define RESTART_SETUP_100K_TICKS 156
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#define RESTART_SETUP_400K_TICKS 20
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#define RESTART_SETUP_1000K_TICKS 12
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@ -169,7 +169,7 @@
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* required to program 'DATA_HOLD' timer at X KHz. This timer determines the
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* SDAT hold time following SCLK driven low.
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*/
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#define DATA_HOLD_100K_TICKS 2
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#define DATA_HOLD_100K_TICKS 12
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#define DATA_HOLD_400K_TICKS 2
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#define DATA_HOLD_1000K_TICKS 2
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@ -190,35 +190,35 @@
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* Bus Idle Minimum time = BUS_IDLE_MIN[7:0] x Baud_Clock_Period x
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* (BUS_IDLE_MIN_XK_TICKS[7] ? 4,1)
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*/
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#define BUS_IDLE_MIN_100K_TICKS 167UL
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#define BUS_IDLE_MIN_400K_TICKS 139UL
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#define BUS_IDLE_MIN_1000K_TICKS 133UL
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#define BUS_IDLE_MIN_100K_TICKS 36UL
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#define BUS_IDLE_MIN_400K_TICKS 10UL
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#define BUS_IDLE_MIN_1000K_TICKS 4UL
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/*
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* CTRL_CUM_TIME_OUT_XK_TICKS defines SMBus Controller Cumulative Time-Out.
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* SMBus Controller Cumulative Time-Out duration =
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* CTRL_CUM_TIME_OUT_XK_TICKS[7:0] x Baud_Clock_Period x 2048
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*/
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#define CTRL_CUM_TIME_OUT_100K_TICKS 159
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#define CTRL_CUM_TIME_OUT_400K_TICKS 159
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#define CTRL_CUM_TIME_OUT_1000K_TICKS 159
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#define CTRL_CUM_TIME_OUT_100K_TICKS 76
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#define CTRL_CUM_TIME_OUT_400K_TICKS 76
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#define CTRL_CUM_TIME_OUT_1000K_TICKS 76
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/*
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* TARGET_CUM_TIME_OUT_XK_TICKS defines SMBus Target Cumulative Time-Out duration.
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* SMBus Target Cumulative Time-Out duration = TARGET_CUM_TIME_OUT_XK_TICKS[7:0] x
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* Baud_Clock_Period x 4096
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*/
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#define TARGET_CUM_TIME_OUT_100K_TICKS 199
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#define TARGET_CUM_TIME_OUT_400K_TICKS 199
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#define TARGET_CUM_TIME_OUT_1000K_TICKS 199
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#define TARGET_CUM_TIME_OUT_100K_TICKS 95
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#define TARGET_CUM_TIME_OUT_400K_TICKS 95
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#define TARGET_CUM_TIME_OUT_1000K_TICKS 95
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/*
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* CLOCK_HIGH_TIME_OUT_XK defines Clock High time out period.
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* Clock High time out period = CLOCK_HIGH_TIME_OUT_XK[7:0] x Baud_Clock_Period x 8
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*/
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#define CLOCK_HIGH_TIME_OUT_100K_TICKS 204
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#define CLOCK_HIGH_TIME_OUT_400K_TICKS 204
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#define CLOCK_HIGH_TIME_OUT_1000K_TICKS 204
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#define CLOCK_HIGH_TIME_OUT_100K_TICKS 97
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#define CLOCK_HIGH_TIME_OUT_400K_TICKS 97
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#define CLOCK_HIGH_TIME_OUT_1000K_TICKS 97
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#define TO_SCALING_100K \
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((BUS_IDLE_MIN_100K_TICKS << 24) | (CTRL_CUM_TIME_OUT_100K_TICKS << 16) | \
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@ -342,18 +342,18 @@ static int ocores_poll_wait(struct ocores_i2c *i2c)
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* ocores_isr(), we just add our polling code around it.
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*
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* It can run in atomic context
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*
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* Return: 0 on success, -ETIMEDOUT on timeout
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*/
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static void ocores_process_polling(struct ocores_i2c *i2c)
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static int ocores_process_polling(struct ocores_i2c *i2c)
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{
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while (1) {
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irqreturn_t ret;
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int err;
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irqreturn_t ret;
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int err = 0;
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while (1) {
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err = ocores_poll_wait(i2c);
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if (err) {
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i2c->state = STATE_ERROR;
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if (err)
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break; /* timeout */
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}
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ret = ocores_isr(-1, i2c);
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if (ret == IRQ_NONE)
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@ -364,13 +364,15 @@ static void ocores_process_polling(struct ocores_i2c *i2c)
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break;
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}
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}
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return err;
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}
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static int ocores_xfer_core(struct ocores_i2c *i2c,
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struct i2c_msg *msgs, int num,
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bool polling)
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{
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int ret;
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int ret = 0;
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u8 ctrl;
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ctrl = oc_getreg(i2c, OCI2C_CONTROL);
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@ -388,15 +390,16 @@ static int ocores_xfer_core(struct ocores_i2c *i2c,
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oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_START);
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if (polling) {
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ocores_process_polling(i2c);
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ret = ocores_process_polling(i2c);
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} else {
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ret = wait_event_timeout(i2c->wait,
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(i2c->state == STATE_ERROR) ||
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(i2c->state == STATE_DONE), HZ);
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if (ret == 0) {
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ocores_process_timeout(i2c);
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return -ETIMEDOUT;
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}
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if (wait_event_timeout(i2c->wait,
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(i2c->state == STATE_ERROR) ||
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(i2c->state == STATE_DONE), HZ) == 0)
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ret = -ETIMEDOUT;
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}
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if (ret) {
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ocores_process_timeout(i2c);
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return ret;
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}
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return (i2c->state == STATE_DONE) ? num : -EIO;
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