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docs/LoongArch: Fix notes rendering by using reST directives

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Notes are better expressed with reST admonitions.

Fixes: 0ea8ce61cb ("Documentation: LoongArch: Add basic documentations")
Reviewed-by: WANG Xuerui <git@xen0n.name>
Signed-off-by: Yanteng Si <siyanteng@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
This commit is contained in:
Yanteng Si 2022-06-17 20:47:54 +08:00 committed by Huacai Chen
parent b672332ef9
commit a667e4d3d0
2 changed files with 22 additions and 15 deletions
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15
Documentation/loongarch/introduction.rst
View File

@ -45,10 +45,12 @@ Name Alias Usage Preserved
``$r23``-``$r31`` ``$s0``-``$s8`` Static registers Yes
================= =============== =================== ============
Note: The register ``$r21`` is reserved in the ELF psABI, but used by the Linux
kernel for storing the percpu base address. It normally has no ABI name, but is
called ``$u0`` in the kernel. You may also see ``$v0`` or ``$v1`` in some old code,
however they are deprecated aliases of ``$a0`` and ``$a1`` respectively.
.. Note::
The register ``$r21`` is reserved in the ELF psABI, but used by the Linux
kernel for storing the percpu base address. It normally has no ABI name,
but is called ``$u0`` in the kernel. You may also see ``$v0`` or ``$v1``
in some old code,however they are deprecated aliases of ``$a0`` and ``$a1``
respectively.
FPRs
----
@ -69,8 +71,9 @@ Name Alias Usage Preserved
``$f24``-``$f31`` ``$fs0``-``$fs7`` Static registers Yes
================= ================== =================== ============
Note: You may see ``$fv0`` or ``$fv1`` in some old code, however they are deprecated
aliases of ``$fa0`` and ``$fa1`` respectively.
.. Note::
You may see ``$fv0`` or ``$fv1`` in some old code, however they are
deprecated aliases of ``$fa0`` and ``$fa1`` respectively.
VRs
----

22
Documentation/loongarch/irq-chip-model.rst
View File

@ -145,12 +145,16 @@ Documentation of Loongson's LS7A chipset:
https://github.com/loongson/LoongArch-Documentation/releases/latest/download/Loongson-7A1000-usermanual-2.00-EN.pdf (in English)
Note: CPUINTC is CSR.ECFG/CSR.ESTAT and its interrupt controller described
in Section 7.4 of "LoongArch Reference Manual, Vol 1"; LIOINTC is "Legacy I/O
Interrupts" described in Section 11.1 of "Loongson 3A5000 Processor Reference
Manual"; EIOINTC is "Extended I/O Interrupts" described in Section 11.2 of
"Loongson 3A5000 Processor Reference Manual"; HTVECINTC is "HyperTransport
Interrupts" described in Section 14.3 of "Loongson 3A5000 Processor Reference
Manual"; PCH-PIC/PCH-MSI is "Interrupt Controller" described in Section 5 of
"Loongson 7A1000 Bridge User Manual"; PCH-LPC is "LPC Interrupts" described in
Section 24.3 of "Loongson 7A1000 Bridge User Manual".
.. Note::
- CPUINTC is CSR.ECFG/CSR.ESTAT and its interrupt controller described
in Section 7.4 of "LoongArch Reference Manual, Vol 1";
- LIOINTC is "Legacy I/OInterrupts" described in Section 11.1 of
"Loongson 3A5000 Processor Reference Manual";
- EIOINTC is "Extended I/O Interrupts" described in Section 11.2 of
"Loongson 3A5000 Processor Reference Manual";
- HTVECINTC is "HyperTransport Interrupts" described in Section 14.3 of
"Loongson 3A5000 Processor Reference Manual";
- PCH-PIC/PCH-MSI is "Interrupt Controller" described in Section 5 of
"Loongson 7A1000 Bridge User Manual";
- PCH-LPC is "LPC Interrupts" described in Section 24.3 of
"Loongson 7A1000 Bridge User Manual".