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mfd: lpc_ich: Add support for Intel Gemini Lake SoC
Like Intel Apollo Lake, Gemini Lake exposes the serial SPI flash device BAR through hidden P2SB PCI device. We use the same mechanism than Apollo Lake to read the BAR and pass it to the driver. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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@ -227,6 +227,7 @@ enum lpc_chipsets {
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LPC_LEWISBURG, /* Lewisburg */
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LPC_9S, /* 9 Series */
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LPC_APL, /* Apollo Lake SoC */
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LPC_GLK, /* Gemini Lake SoC */
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LPC_COUGARMOUNTAIN,/* Cougar Mountain SoC*/
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};
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@ -555,6 +556,10 @@ static struct lpc_ich_info lpc_chipset_info[] = {
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.iTCO_version = 5,
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.spi_type = INTEL_SPI_BXT,
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},
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[LPC_GLK] = {
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.name = "Gemini Lake SoC",
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.spi_type = INTEL_SPI_BXT,
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},
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[LPC_COUGARMOUNTAIN] = {
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.name = "Cougar Mountain SoC",
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.iTCO_version = 3,
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@ -687,6 +692,7 @@ static const struct pci_device_id lpc_ich_ids[] = {
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{ PCI_VDEVICE(INTEL, 0x2917), LPC_ICH9ME},
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{ PCI_VDEVICE(INTEL, 0x2918), LPC_ICH9},
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{ PCI_VDEVICE(INTEL, 0x2919), LPC_ICH9M},
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{ PCI_VDEVICE(INTEL, 0x3197), LPC_GLK},
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{ PCI_VDEVICE(INTEL, 0x2b9c), LPC_COUGARMOUNTAIN},
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{ PCI_VDEVICE(INTEL, 0x3a14), LPC_ICH10DO},
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{ PCI_VDEVICE(INTEL, 0x3a16), LPC_ICH10R},
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