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sh: hwblk for sh7722
This patch contains the sh7722 specific hwblk implementation. Hwblk ids are added to the processor specific header file, module stop bits and areas are kept track of as hwblks, clocks are converted to make use of the shared hwblk code. Code to determine allowed sleep modes is also added. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Magnus Damm
Paul Mundt
parent
79714acbab
commit
a61c1a6366
@ -221,4 +221,18 @@ enum {
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GPIO_FN_KEYOUT3, GPIO_FN_KEYOUT4_IN6, GPIO_FN_KEYOUT5_IN5,
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};
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enum {
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HWBLK_UNKNOWN = 0,
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HWBLK_TLB, HWBLK_IC, HWBLK_OC, HWBLK_URAM, HWBLK_XYMEM,
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HWBLK_INTC, HWBLK_DMAC, HWBLK_SHYWAY, HWBLK_HUDI,
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HWBLK_UBC, HWBLK_TMU, HWBLK_CMT, HWBLK_RWDT, HWBLK_FLCTL,
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HWBLK_SCIF0, HWBLK_SCIF1, HWBLK_SCIF2, HWBLK_SIO,
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HWBLK_SIOF0, HWBLK_SIOF1, HWBLK_IIC, HWBLK_RTC,
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HWBLK_TPU, HWBLK_IRDA, HWBLK_SDHI, HWBLK_SIM, HWBLK_KEYSC,
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HWBLK_TSIF, HWBLK_USBF, HWBLK_2DG, HWBLK_SIU, HWBLK_VOU,
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HWBLK_JPU, HWBLK_BEU, HWBLK_CEU, HWBLK_VEU, HWBLK_VPU,
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HWBLK_LCDC,
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HWBLK_NR,
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};
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#endif /* __ASM_SH7722_H__ */
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@ -25,7 +25,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7786) := clock-sh7786.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o hwblk-sh7722.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7723.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7724) := clock-sh7724.o
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clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7366.o
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@ -22,6 +22,8 @@
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <asm/clock.h>
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#include <asm/hwblk.h>
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#include <cpu/sh7722.h>
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/* SH7722 registers */
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#define FRQCR 0xa4150000
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@ -140,35 +142,37 @@ struct clk div6_clks[] = {
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SH_CLK_DIV6("video_clk", &pll_clk, VCLKCR, 0),
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};
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#define MSTP(_str, _parent, _reg, _bit, _flags) \
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SH_CLK_MSTP32(_str, -1, _parent, _reg, _bit, _flags)
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#define R_CLK &r_clk
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#define P_CLK &div4_clks[DIV4_P]
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#define B_CLK &div4_clks[DIV4_B]
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#define U_CLK &div4_clks[DIV4_U]
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static struct clk mstp_clks[] = {
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MSTP("uram0", &div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT),
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MSTP("xymem0", &div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT),
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MSTP("tmu0", &div4_clks[DIV4_P], MSTPCR0, 15, 0),
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MSTP("cmt0", &r_clk, MSTPCR0, 14, 0),
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MSTP("rwdt0", &r_clk, MSTPCR0, 13, 0),
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MSTP("flctl0", &div4_clks[DIV4_P], MSTPCR0, 10, 0),
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MSTP("scif0", &div4_clks[DIV4_P], MSTPCR0, 7, 0),
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MSTP("scif1", &div4_clks[DIV4_P], MSTPCR0, 6, 0),
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MSTP("scif2", &div4_clks[DIV4_P], MSTPCR0, 5, 0),
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SH_HWBLK_CLK("uram0", -1, U_CLK, HWBLK_URAM, CLK_ENABLE_ON_INIT),
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SH_HWBLK_CLK("xymem0", -1, B_CLK, HWBLK_XYMEM, CLK_ENABLE_ON_INIT),
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SH_HWBLK_CLK("tmu0", -1, P_CLK, HWBLK_TMU, 0),
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SH_HWBLK_CLK("cmt0", -1, R_CLK, HWBLK_CMT, 0),
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SH_HWBLK_CLK("rwdt0", -1, R_CLK, HWBLK_RWDT, 0),
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SH_HWBLK_CLK("flctl0", -1, P_CLK, HWBLK_FLCTL, 0),
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SH_HWBLK_CLK("scif0", -1, P_CLK, HWBLK_SCIF0, 0),
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SH_HWBLK_CLK("scif1", -1, P_CLK, HWBLK_SCIF1, 0),
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SH_HWBLK_CLK("scif2", -1, P_CLK, HWBLK_SCIF2, 0),
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MSTP("i2c0", &div4_clks[DIV4_P], MSTPCR1, 9, 0),
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MSTP("rtc0", &r_clk, MSTPCR1, 8, 0),
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SH_HWBLK_CLK("i2c0", -1, P_CLK, HWBLK_IIC, 0),
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SH_HWBLK_CLK("rtc0", -1, R_CLK, HWBLK_RTC, 0),
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MSTP("sdhi0", &div4_clks[DIV4_P], MSTPCR2, 18, 0),
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MSTP("keysc0", &r_clk, MSTPCR2, 14, 0),
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MSTP("usbf0", &div4_clks[DIV4_P], MSTPCR2, 11, 0),
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MSTP("2dg0", &div4_clks[DIV4_B], MSTPCR2, 9, 0),
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MSTP("siu0", &div4_clks[DIV4_B], MSTPCR2, 8, 0),
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MSTP("vou0", &div4_clks[DIV4_B], MSTPCR2, 5, 0),
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MSTP("jpu0", &div4_clks[DIV4_B], MSTPCR2, 6, CLK_ENABLE_ON_INIT),
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MSTP("beu0", &div4_clks[DIV4_B], MSTPCR2, 4, 0),
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MSTP("ceu0", &div4_clks[DIV4_B], MSTPCR2, 3, 0),
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MSTP("veu0", &div4_clks[DIV4_B], MSTPCR2, 2, CLK_ENABLE_ON_INIT),
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MSTP("vpu0", &div4_clks[DIV4_B], MSTPCR2, 1, CLK_ENABLE_ON_INIT),
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MSTP("lcdc0", &div4_clks[DIV4_B], MSTPCR2, 0, 0),
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SH_HWBLK_CLK("sdhi0", -1, P_CLK, HWBLK_SDHI, 0),
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SH_HWBLK_CLK("keysc0", -1, R_CLK, HWBLK_KEYSC, 0),
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SH_HWBLK_CLK("usbf0", -1, P_CLK, HWBLK_USBF, 0),
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SH_HWBLK_CLK("2dg0", -1, B_CLK, HWBLK_2DG, 0),
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SH_HWBLK_CLK("siu0", -1, B_CLK, HWBLK_SIU, 0),
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SH_HWBLK_CLK("vou0", -1, B_CLK, HWBLK_VOU, 0),
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SH_HWBLK_CLK("jpu0", -1, B_CLK, HWBLK_JPU, CLK_ENABLE_ON_INIT),
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SH_HWBLK_CLK("beu0", -1, B_CLK, HWBLK_BEU, 0),
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SH_HWBLK_CLK("ceu0", -1, B_CLK, HWBLK_CEU, 0),
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SH_HWBLK_CLK("veu0", -1, B_CLK, HWBLK_VEU, CLK_ENABLE_ON_INIT),
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SH_HWBLK_CLK("vpu0", -1, B_CLK, HWBLK_VPU, CLK_ENABLE_ON_INIT),
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SH_HWBLK_CLK("lcdc0", -1, P_CLK, HWBLK_LCDC, 0),
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};
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int __init arch_clk_init(void)
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@ -191,7 +195,7 @@ int __init arch_clk_init(void)
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ret = sh_clk_div6_register(div6_clks, ARRAY_SIZE(div6_clks));
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if (!ret)
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ret = sh_clk_mstp32_register(mstp_clks, ARRAY_SIZE(mstp_clks));
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ret = sh_hwblk_clk_register(mstp_clks, ARRAY_SIZE(mstp_clks));
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return ret;
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}
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106
arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c
Normal file
106
arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c
Normal file
@ -0,0 +1,106 @@
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/*
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* arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c
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*
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* SH7722 hardware block support
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*
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* Copyright (C) 2009 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <asm/suspend.h>
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#include <asm/hwblk.h>
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#include <cpu/sh7722.h>
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/* SH7722 registers */
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#define MSTPCR0 0xa4150030
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#define MSTPCR1 0xa4150034
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#define MSTPCR2 0xa4150038
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/* SH7722 Power Domains */
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enum { CORE_AREA, SUB_AREA, CORE_AREA_BM };
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static struct hwblk_area sh7722_hwblk_area[] = {
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[CORE_AREA] = HWBLK_AREA(0, 0),
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[CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA),
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[SUB_AREA] = HWBLK_AREA(0, 0),
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};
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/* Table mapping HWBLK to Module Stop Bit and Power Domain */
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static struct hwblk sh7722_hwblk[HWBLK_NR] = {
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[HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA),
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[HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA),
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[HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA),
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[HWBLK_URAM] = HWBLK(MSTPCR0, 28, CORE_AREA),
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[HWBLK_XYMEM] = HWBLK(MSTPCR0, 26, CORE_AREA),
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[HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA),
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[HWBLK_DMAC] = HWBLK(MSTPCR0, 21, CORE_AREA_BM),
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[HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA),
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[HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA),
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[HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA),
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[HWBLK_TMU] = HWBLK(MSTPCR0, 15, CORE_AREA),
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[HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA),
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[HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA),
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[HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA),
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[HWBLK_SCIF0] = HWBLK(MSTPCR0, 7, CORE_AREA),
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[HWBLK_SCIF1] = HWBLK(MSTPCR0, 6, CORE_AREA),
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[HWBLK_SCIF2] = HWBLK(MSTPCR0, 5, CORE_AREA),
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[HWBLK_SIO] = HWBLK(MSTPCR0, 3, CORE_AREA),
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[HWBLK_SIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA),
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[HWBLK_SIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA),
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[HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA),
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[HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA),
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[HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA),
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[HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA),
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[HWBLK_SDHI] = HWBLK(MSTPCR2, 18, CORE_AREA),
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[HWBLK_SIM] = HWBLK(MSTPCR2, 16, CORE_AREA),
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[HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA),
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[HWBLK_TSIF] = HWBLK(MSTPCR2, 13, SUB_AREA),
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[HWBLK_USBF] = HWBLK(MSTPCR2, 11, CORE_AREA),
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[HWBLK_2DG] = HWBLK(MSTPCR2, 9, CORE_AREA_BM),
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[HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA),
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[HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM),
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[HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM),
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[HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM),
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[HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM),
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[HWBLK_VEU] = HWBLK(MSTPCR2, 2, CORE_AREA_BM),
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[HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM),
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[HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM),
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};
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static struct hwblk_info sh7722_hwblk_info = {
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.areas = sh7722_hwblk_area,
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.nr_areas = ARRAY_SIZE(sh7722_hwblk_area),
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.hwblks = sh7722_hwblk,
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.nr_hwblks = ARRAY_SIZE(sh7722_hwblk),
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};
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int arch_hwblk_sleep_mode(void)
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{
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if (!sh7722_hwblk_area[CORE_AREA].cnt)
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return SUSP_SH_STANDBY | SUSP_SH_SF;
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if (!sh7722_hwblk_area[CORE_AREA_BM].cnt)
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return SUSP_SH_SLEEP | SUSP_SH_SF;
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return SUSP_SH_SLEEP;
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}
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int __init arch_hwblk_init(void)
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{
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return hwblk_register(&sh7722_hwblk_info);
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}
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