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clk: imx: Rework all imx_clk_hw_composite wrappers

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Rather than having multiple different macros for each different type
of imx8m_clk_hw_composite, implement them in such a way so we can
take advantage the most of the already defined simpler types. Basically,
we end up having one low-level __imx8m_clk_hw_composite function, a
wrapper to simplify the parents related arguments called
_imx8m_clk_hw_composite and then all the types can use those for each
specific case.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/1631521490-17171-8-git-send-email-abel.vesa@nxp.com
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Abel Vesa 2021-09-13 11:24:49 +03:00
parent b170586afc
commit a60fe746df
2 changed files with 41 additions and 37 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/clk/imx/clk-composite-8m.c
View File

@ -171,7 +171,7 @@ static const struct clk_ops imx8m_clk_composite_mux_ops = {
.determine_rate = imx8m_clk_composite_mux_determine_rate, .determine_rate = imx8m_clk_composite_mux_determine_rate,
}; };
struct clk_hw *imx8m_clk_hw_composite_flags(const char *name, struct clk_hw *__imx8m_clk_hw_composite(const char *name,
const char * const *parent_names, const char * const *parent_names,
int num_parents, void __iomem *reg, int num_parents, void __iomem *reg,
u32 composite_flags, u32 composite_flags,
@ -246,4 +246,4 @@ fail:
kfree(mux); kfree(mux);
return ERR_CAST(hw); return ERR_CAST(hw);
} }
EXPORT_SYMBOL_GPL(imx8m_clk_hw_composite_flags); EXPORT_SYMBOL_GPL(__imx8m_clk_hw_composite);

74
drivers/clk/imx/clk.h
View File

@ -357,51 +357,55 @@ struct clk_hw *imx_clk_hw_cpu(const char *name, const char *parent_name,
#define IMX_COMPOSITE_BUS BIT(1) #define IMX_COMPOSITE_BUS BIT(1)
#define IMX_COMPOSITE_FW_MANAGED BIT(2) #define IMX_COMPOSITE_FW_MANAGED BIT(2)
struct clk_hw *imx8m_clk_hw_composite_flags(const char *name, #define IMX_COMPOSITE_CLK_FLAGS_DEFAULT \
(CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE)
#define IMX_COMPOSITE_CLK_FLAGS_CRITICAL \
(IMX_COMPOSITE_CLK_FLAGS_DEFAULT | CLK_IS_CRITICAL)
#define IMX_COMPOSITE_CLK_FLAGS_GET_RATE_NO_CACHE \
(IMX_COMPOSITE_CLK_FLAGS_DEFAULT | CLK_GET_RATE_NOCACHE)
#define IMX_COMPOSITE_CLK_FLAGS_CRITICAL_GET_RATE_NO_CACHE \
(IMX_COMPOSITE_CLK_FLAGS_GET_RATE_NO_CACHE | CLK_IS_CRITICAL)
struct clk_hw *__imx8m_clk_hw_composite(const char *name,
const char * const *parent_names, const char * const *parent_names,
int num_parents, int num_parents,
void __iomem *reg, void __iomem *reg,
u32 composite_flags, u32 composite_flags,
unsigned long flags); unsigned long flags);
#define imx8m_clk_hw_composite_bus(name, parent_names, reg) \ #define _imx8m_clk_hw_composite(name, parent_names, reg, composite_flags, flags) \
imx8m_clk_hw_composite_flags(name, parent_names, \ __imx8m_clk_hw_composite(name, parent_names, \
ARRAY_SIZE(parent_names), reg, \ ARRAY_SIZE(parent_names), reg, composite_flags, flags)
IMX_COMPOSITE_BUS, \
CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE)
#define imx8m_clk_hw_composite_bus_critical(name, parent_names, reg) \
imx8m_clk_hw_composite_flags(name, parent_names, ARRAY_SIZE(parent_names), reg, \
IMX_COMPOSITE_BUS, \
CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE | CLK_IS_CRITICAL)
#define imx8m_clk_hw_composite_core(name, parent_names, reg) \
imx8m_clk_hw_composite_flags(name, parent_names, \
ARRAY_SIZE(parent_names), reg, \
IMX_COMPOSITE_CORE, \
CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE)
#define __imx8m_clk_hw_composite(name, parent_names, reg, flags) \
imx8m_clk_hw_composite_flags(name, parent_names, \
ARRAY_SIZE(parent_names), reg, 0, \
flags | CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE)
#define __imx8m_clk_hw_fw_managed_composite(name, parent_names, reg, flags) \
imx8m_clk_hw_composite_flags(name, parent_names, \
ARRAY_SIZE(parent_names), reg, IMX_COMPOSITE_FW_MANAGED, \
flags | CLK_GET_RATE_NOCACHE | CLK_SET_RATE_NO_REPARENT | CLK_OPS_PARENT_ENABLE)
#define imx8m_clk_hw_fw_managed_composite(name, parent_names, reg) \
__imx8m_clk_hw_fw_managed_composite(name, parent_names, reg, 0)
#define imx8m_clk_hw_fw_managed_composite_critical(name, parent_names, reg) \
__imx8m_clk_hw_fw_managed_composite(name, parent_names, reg, CLK_IS_CRITICAL)
#define imx8m_clk_hw_composite(name, parent_names, reg) \ #define imx8m_clk_hw_composite(name, parent_names, reg) \
__imx8m_clk_hw_composite(name, parent_names, reg, 0) _imx8m_clk_hw_composite(name, parent_names, reg, \
IMX_COMPOSITE_CORE, IMX_COMPOSITE_CLK_FLAGS_DEFAULT)
#define imx8m_clk_hw_composite_critical(name, parent_names, reg) \ #define imx8m_clk_hw_composite_critical(name, parent_names, reg) \
__imx8m_clk_hw_composite(name, parent_names, reg, CLK_IS_CRITICAL) _imx8m_clk_hw_composite(name, parent_names, reg, \
IMX_COMPOSITE_CORE, IMX_COMPOSITE_CLK_FLAGS_CRITICAL)
#define imx8m_clk_hw_composite_bus(name, parent_names, reg) \
_imx8m_clk_hw_composite(name, parent_names, reg, \
IMX_COMPOSITE_BUS, IMX_COMPOSITE_CLK_FLAGS_DEFAULT)
#define imx8m_clk_hw_composite_bus_critical(name, parent_names, reg) \
_imx8m_clk_hw_composite(name, parent_names, reg, \
IMX_COMPOSITE_BUS, IMX_COMPOSITE_CLK_FLAGS_CRITICAL)
#define imx8m_clk_hw_composite_core(name, parent_names, reg) \
_imx8m_clk_hw_composite(name, parent_names, reg, \
IMX_COMPOSITE_CORE, IMX_COMPOSITE_CLK_FLAGS_DEFAULT)
#define imx8m_clk_hw_fw_managed_composite(name, parent_names, reg) \
_imx8m_clk_hw_composite(name, parent_names, reg, \
IMX_COMPOSITE_FW_MANAGED, \
IMX_COMPOSITE_CLK_FLAGS_GET_RATE_NO_CACHE)
#define imx8m_clk_hw_fw_managed_composite_critical(name, parent_names, reg) \
_imx8m_clk_hw_composite(name, parent_names, reg, \
IMX_COMPOSITE_FW_MANAGED, \
IMX_COMPOSITE_CLK_FLAGS_CRITICAL_GET_RATE_NO_CACHE)
struct clk_hw *imx_clk_hw_divider_gate(const char *name, const char *parent_name, struct clk_hw *imx_clk_hw_divider_gate(const char *name, const char *parent_name,
unsigned long flags, void __iomem *reg, u8 shift, u8 width, unsigned long flags, void __iomem *reg, u8 shift, u8 width,