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clocksource/drivers/exynos_mct: Move one-shot check from tick clear to ISR
When a timer tick occurs and the clock is in one-shot mode, the timer needs to be stopped to prevent it triggering subsequent interrupts. Currently this code is in exynos4_mct_tick_clear(), but as it is only needed when an ISR occurs move it into exynos4_mct_tick_isr(), leaving exynos4_mct_tick_clear() just doing what its name suggests it should. Signed-off-by: Stuart Menefy <stuart.menefy@mathembedded.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Cc: stable@vger.kernel.org # v4.3+ Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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@ -388,6 +388,13 @@ static void exynos4_mct_tick_start(unsigned long cycles,
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exynos4_mct_write(tmp, mevt->base + MCT_L_TCON_OFFSET);
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exynos4_mct_write(tmp, mevt->base + MCT_L_TCON_OFFSET);
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}
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}
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static void exynos4_mct_tick_clear(struct mct_clock_event_device *mevt)
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{
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/* Clear the MCT tick interrupt */
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if (readl_relaxed(reg_base + mevt->base + MCT_L_INT_CSTAT_OFFSET) & 1)
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exynos4_mct_write(0x1, mevt->base + MCT_L_INT_CSTAT_OFFSET);
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}
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static int exynos4_tick_set_next_event(unsigned long cycles,
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static int exynos4_tick_set_next_event(unsigned long cycles,
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struct clock_event_device *evt)
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struct clock_event_device *evt)
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{
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{
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@ -420,8 +427,11 @@ static int set_state_periodic(struct clock_event_device *evt)
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return 0;
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return 0;
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}
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}
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static void exynos4_mct_tick_clear(struct mct_clock_event_device *mevt)
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static irqreturn_t exynos4_mct_tick_isr(int irq, void *dev_id)
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{
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{
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struct mct_clock_event_device *mevt = dev_id;
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struct clock_event_device *evt = &mevt->evt;
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/*
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/*
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* This is for supporting oneshot mode.
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* This is for supporting oneshot mode.
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* Mct would generate interrupt periodically
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* Mct would generate interrupt periodically
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@ -430,16 +440,6 @@ static void exynos4_mct_tick_clear(struct mct_clock_event_device *mevt)
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if (!clockevent_state_periodic(&mevt->evt))
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if (!clockevent_state_periodic(&mevt->evt))
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exynos4_mct_tick_stop(mevt);
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exynos4_mct_tick_stop(mevt);
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/* Clear the MCT tick interrupt */
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if (readl_relaxed(reg_base + mevt->base + MCT_L_INT_CSTAT_OFFSET) & 1)
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exynos4_mct_write(0x1, mevt->base + MCT_L_INT_CSTAT_OFFSET);
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}
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static irqreturn_t exynos4_mct_tick_isr(int irq, void *dev_id)
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{
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struct mct_clock_event_device *mevt = dev_id;
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struct clock_event_device *evt = &mevt->evt;
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exynos4_mct_tick_clear(mevt);
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exynos4_mct_tick_clear(mevt);
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evt->event_handler(evt);
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evt->event_handler(evt);
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