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clk: qcom: clk-alpha-pll: Simplify the zonda_pll_adjust_l_val()

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In zonda_pll_adjust_l_val() replace the divide operator with comparison
operator to fix below build error and smatch warning.

drivers/clk/qcom/clk-alpha-pll.o: In function `clk_zonda_pll_set_rate':
clk-alpha-pll.c:(.text+0x45dc): undefined reference to `__aeabi_uldivmod'

smatch warnings:
drivers/clk/qcom/clk-alpha-pll.c:2129 zonda_pll_adjust_l_val() warn: replace
divide condition '(remainder * 2) / prate' with '(remainder * 2) >= prate'

Fixes: f4973130d2 ("clk: qcom: clk-alpha-pll: Update set_rate for Zonda PLL")
Reported-by: Jon Hunter <jonathanh@nvidia.com>
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@linaro.org>
Closes: https://lore.kernel.org/r/202408110724.8pqbpDiD-lkp@intel.com/
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Link: https://lore.kernel.org/r/20240906113905.641336-1-quic_skakitap@quicinc.com
Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Satya Priya Kakitapalli 2024-09-06 17:09:05 +05:30 committed by Stephen Boyd
parent 71c03a8cb2
commit a4d89b11ac
1 changed files with 1 additions and 3 deletions
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4
drivers/clk/qcom/clk-alpha-pll.c
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@ -2124,10 +2124,8 @@ static void zonda_pll_adjust_l_val(unsigned long rate, unsigned long prate, u32
quotient = rate; quotient = rate;
remainder = do_div(quotient, prate); remainder = do_div(quotient, prate);
*l = quotient;
if ((remainder * 2) / prate) *l = rate + (u32)(remainder * 2 >= prate);
*l = *l + 1;
} }
static int clk_zonda_pll_set_rate(struct clk_hw *hw, unsigned long rate, static int clk_zonda_pll_set_rate(struct clk_hw *hw, unsigned long rate,