From 2fa0f93915eacf758da800e2c67b3b9adef1c5c5 Mon Sep 17 00:00:00 2001 From: Simon Guinot Date: Thu, 21 Oct 2010 11:42:28 +0200 Subject: [PATCH 01/18] [ARM] Kirkwood: enhance TCLK detection According to the Marvell LSP, the Sample at Reset regiter bit 21 can be used to detect TCLK on 6281 and 6282 devices. This patch has only been tested on LaCie boards. Signed-off-by: Simon Guinot Acked-by: Lennert Buytenhek Signed-off-by: Nicolas Pitre --- arch/arm/mach-kirkwood/common.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c index 1c82d4290dad..ee99a5acc89d 100644 --- a/arch/arm/mach-kirkwood/common.c +++ b/arch/arm/mach-kirkwood/common.c @@ -854,10 +854,9 @@ int __init kirkwood_find_tclk(void) kirkwood_pcie_id(&dev, &rev); - if ((dev == MV88F6281_DEV_ID && (rev == MV88F6281_REV_A0 || - rev == MV88F6281_REV_A1)) || - (dev == MV88F6282_DEV_ID)) - return 200000000; + if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID) + if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0) + return 200000000; return 166666667; } From d3491820e8a65c4a51c8e2a165c6a13f864101ba Mon Sep 17 00:00:00 2001 From: Simon Guinot Date: Thu, 21 Oct 2010 11:42:29 +0200 Subject: [PATCH 02/18] [ARM] Kirkwood: fix timer initialization for LaCie boards Signed-off-by: Simon Guinot Acked-by: Lennert Buytenhek Signed-off-by: Nicolas Pitre --- arch/arm/mach-kirkwood/d2net_v2-setup.c | 2 +- arch/arm/mach-kirkwood/lacie_v2-common.c | 14 -------------- arch/arm/mach-kirkwood/lacie_v2-common.h | 2 -- arch/arm/mach-kirkwood/netspace_v2-setup.c | 6 +++--- arch/arm/mach-kirkwood/netxbig_v2-setup.c | 4 ++-- 5 files changed, 6 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-kirkwood/d2net_v2-setup.c b/arch/arm/mach-kirkwood/d2net_v2-setup.c index cd62d0f82a73..b8078aeebef9 100644 --- a/arch/arm/mach-kirkwood/d2net_v2-setup.c +++ b/arch/arm/mach-kirkwood/d2net_v2-setup.c @@ -227,5 +227,5 @@ MACHINE_START(D2NET_V2, "LaCie d2 Network v2") .init_machine = d2net_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.c b/arch/arm/mach-kirkwood/lacie_v2-common.c index d3ea1b6c8a02..285edab776e9 100644 --- a/arch/arm/mach-kirkwood/lacie_v2-common.c +++ b/arch/arm/mach-kirkwood/lacie_v2-common.c @@ -111,17 +111,3 @@ void __init lacie_v2_hdd_power_init(int hdd_num) pr_err("Failed to power up HDD%d\n", i + 1); } } - -/***************************************************************************** - * Timer - ****************************************************************************/ - -static void lacie_v2_timer_init(void) -{ - kirkwood_tclk = 166666667; - orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk); -} - -struct sys_timer lacie_v2_timer = { - .init = lacie_v2_timer_init, -}; diff --git a/arch/arm/mach-kirkwood/lacie_v2-common.h b/arch/arm/mach-kirkwood/lacie_v2-common.h index af521315b87b..fc64f578536e 100644 --- a/arch/arm/mach-kirkwood/lacie_v2-common.h +++ b/arch/arm/mach-kirkwood/lacie_v2-common.h @@ -13,6 +13,4 @@ void lacie_v2_register_flash(void); void lacie_v2_register_i2c_devices(void); void lacie_v2_hdd_power_init(int hdd_num); -extern struct sys_timer lacie_v2_timer; - #endif diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c index fed264d28f4a..fc934e5a9ed0 100644 --- a/arch/arm/mach-kirkwood/netspace_v2-setup.c +++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c @@ -221,7 +221,7 @@ MACHINE_START(NETSPACE_V2, "LaCie Network Space v2") .init_machine = netspace_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END #endif @@ -233,7 +233,7 @@ MACHINE_START(INETSPACE_V2, "LaCie Internet Space v2") .init_machine = netspace_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END #endif @@ -245,6 +245,6 @@ MACHINE_START(NETSPACE_MAX_V2, "LaCie Network Space Max v2") .init_machine = netspace_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END #endif diff --git a/arch/arm/mach-kirkwood/netxbig_v2-setup.c b/arch/arm/mach-kirkwood/netxbig_v2-setup.c index d970e1eee37d..a855c9f08291 100644 --- a/arch/arm/mach-kirkwood/netxbig_v2-setup.c +++ b/arch/arm/mach-kirkwood/netxbig_v2-setup.c @@ -405,7 +405,7 @@ MACHINE_START(NET2BIG_V2, "LaCie 2Big Network v2") .init_machine = netxbig_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END #endif @@ -417,6 +417,6 @@ MACHINE_START(NET5BIG_V2, "LaCie 5Big Network v2") .init_machine = netxbig_v2_init, .map_io = kirkwood_map_io, .init_irq = kirkwood_init_irq, - .timer = &lacie_v2_timer, + .timer = &kirkwood_timer, MACHINE_END #endif From 3924996bab2845bdf9a9d16ff7c20445de1ab55d Mon Sep 17 00:00:00 2001 From: Nicolas Pitre Date: Thu, 21 Oct 2010 15:48:33 -0400 Subject: [PATCH 03/18] [ARM] Kirkwood: restrict the scope of the PCIe reset workaround Commit 21f0ba90a447 "orion/kirkwood: reset PCIe unit on boot" made the reset of the PCIe unit unconditional. While this may fix problems on some targets, this also causes problems on other targets. Saeed Bishara said about the original problem: "We couln't pinpoint the root cause of this issue, actually we failed to reproduce that issue." So let's restrict the reset of the PCIe unit only to the target where the original problem was observed. Signed-off-by: Nicolas Pitre --- arch/arm/mach-kirkwood/ts41x-setup.c | 14 +++++++++++++- arch/arm/plat-orion/include/plat/pcie.h | 3 +++ arch/arm/plat-orion/pcie.c | 5 ----- 3 files changed, 16 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-kirkwood/ts41x-setup.c b/arch/arm/mach-kirkwood/ts41x-setup.c index 2e14afef07a2..6995199a9127 100644 --- a/arch/arm/mach-kirkwood/ts41x-setup.c +++ b/arch/arm/mach-kirkwood/ts41x-setup.c @@ -27,6 +27,10 @@ #include "mpp.h" #include "tsx1x-common.h" +/* for the PCIe reset workaround */ +#include + + #define QNAP_TS41X_JUMPER_JP1 45 static struct i2c_board_info __initdata qnap_ts41x_i2c_rtc = { @@ -140,8 +144,16 @@ static void __init qnap_ts41x_init(void) static int __init ts41x_pci_init(void) { - if (machine_is_ts41x()) + if (machine_is_ts41x()) { + /* + * Without this explicit reset, the PCIe SATA controller + * (Marvell 88sx7042/sata_mv) is known to stop working + * after a few minutes. + */ + orion_pcie_reset((void __iomem *)PCIE_VIRT_BASE); + kirkwood_pcie_init(KW_PCIE0); + } return 0; } diff --git a/arch/arm/plat-orion/include/plat/pcie.h b/arch/arm/plat-orion/include/plat/pcie.h index 3ebfef72b4e7..cc99163e73fd 100644 --- a/arch/arm/plat-orion/include/plat/pcie.h +++ b/arch/arm/plat-orion/include/plat/pcie.h @@ -11,12 +11,15 @@ #ifndef __PLAT_PCIE_H #define __PLAT_PCIE_H +struct pci_bus; + u32 orion_pcie_dev_id(void __iomem *base); u32 orion_pcie_rev(void __iomem *base); int orion_pcie_link_up(void __iomem *base); int orion_pcie_x4_mode(void __iomem *base); int orion_pcie_get_local_bus_nr(void __iomem *base); void orion_pcie_set_local_bus_nr(void __iomem *base, int nr); +void orion_pcie_reset(void __iomem *base); void orion_pcie_setup(void __iomem *base, struct mbus_dram_target_info *dram); int orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, diff --git a/arch/arm/plat-orion/pcie.c b/arch/arm/plat-orion/pcie.c index 779553a1595e..af2d733c50b5 100644 --- a/arch/arm/plat-orion/pcie.c +++ b/arch/arm/plat-orion/pcie.c @@ -181,11 +181,6 @@ void __init orion_pcie_setup(void __iomem *base, u16 cmd; u32 mask; - /* - * soft reset PCIe unit - */ - orion_pcie_reset(base); - /* * Point PCIe unit MBUS decode windows to DRAM space. */ From 3073f0fa2b50808f0a506370e494456d4aa73718 Mon Sep 17 00:00:00 2001 From: Haojian Zhuang Date: Fri, 29 Oct 2010 11:32:56 +0800 Subject: [PATCH 04/18] ARM: mmp: fix cpuid detection on mmp2 Fix typo error on cpu_is_mmp2(). Correct cpu_readid_id() to read_cpuid_id(). Append missing parenthesis. Signed-off-by: Haojian Zhuang Signed-off-by: Eric Miao --- arch/arm/mach-mmp/include/mach/cputype.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-mmp/include/mach/cputype.h b/arch/arm/mach-mmp/include/mach/cputype.h index f43a68b213f1..8a3b56dfd35d 100644 --- a/arch/arm/mach-mmp/include/mach/cputype.h +++ b/arch/arm/mach-mmp/include/mach/cputype.h @@ -46,7 +46,8 @@ static inline int cpu_is_pxa910(void) #ifdef CONFIG_CPU_MMP2 static inline int cpu_is_mmp2(void) { - return (((cpu_readid_id() >> 8) & 0xff) == 0x58); + return (((read_cpuid_id() >> 8) & 0xff) == 0x58); +} #else #define cpu_is_mmp2() (0) #endif From 12cdcc8523f15051a5a4001de906bcf61acf6c36 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Tue, 2 Nov 2010 04:53:59 +0800 Subject: [PATCH 05/18] ARM: pxa: fix the missing definition of IRQ_BOARD_END Signed-off-by: Eric Miao Cc: Haojian Zhuang Cc: Mike Rapoport --- arch/arm/include/asm/hardware/it8152.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h index 6700c7fc7ebd..21fa272301f8 100644 --- a/arch/arm/include/asm/hardware/it8152.h +++ b/arch/arm/include/asm/hardware/it8152.h @@ -75,7 +75,7 @@ extern unsigned long it8152_base_address; IT8152_PD_IRQ(1) USB (USBR) IT8152_PD_IRQ(0) Audio controller (ACR) */ -#define IT8152_IRQ(x) (IRQ_BOARD_END + (x)) +#define IT8152_IRQ(x) (IRQ_BOARD_START + (x)) /* IRQ-sources in 3 groups - local devices, LPC (serial), and external PCI */ #define IT8152_LD_IRQ_COUNT 9 From 51e930ae44cb905ba1616add2e3c7f33f0bbbc0e Mon Sep 17 00:00:00 2001 From: Mike Rapoport Date: Sun, 26 Sep 2010 14:37:49 +0200 Subject: [PATCH 06/18] ARM: pxa/cm-x2xx: remove duplicate call to pxa27x_init_irq Signed-off-by: Mike Rapoport Signed-off-by: Eric Miao --- arch/arm/mach-pxa/cm-x2xx.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm/mach-pxa/cm-x2xx.c b/arch/arm/mach-pxa/cm-x2xx.c index ac5598ce9724..d34b99febeb9 100644 --- a/arch/arm/mach-pxa/cm-x2xx.c +++ b/arch/arm/mach-pxa/cm-x2xx.c @@ -476,8 +476,6 @@ static void __init cmx2xx_init(void) static void __init cmx2xx_init_irq(void) { - pxa27x_init_irq(); - if (cpu_is_pxa25x()) { pxa25x_init_irq(); cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ); From 72feb6e7cb55e7947653446e52e54d66134ac1b5 Mon Sep 17 00:00:00 2001 From: Eric Miao Date: Tue, 2 Nov 2010 21:17:46 +0800 Subject: [PATCH 07/18] ARM: pxa/saar: fix the building failure caused by typo Signed-off-by: Eric Miao Cc: Haojian Zhuang --- arch/arm/mach-pxa/saar.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-pxa/saar.c b/arch/arm/mach-pxa/saar.c index 4b521e045d75..ffa50e633ee6 100644 --- a/arch/arm/mach-pxa/saar.c +++ b/arch/arm/mach-pxa/saar.c @@ -116,7 +116,7 @@ static struct platform_device smc91x_device = { }, }; -#if defined(CONFIG_FB_PXA) || (CONFIG_FB_PXA_MODULE) +#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) static uint16_t lcd_power_on[] = { /* single frame */ SMART_CMD_NOOP, From 377304abefa208890dce5739e4f297c93240efb2 Mon Sep 17 00:00:00 2001 From: Michael Spang Date: Fri, 5 Nov 2010 13:14:40 -0400 Subject: [PATCH 08/18] [ARM] TS-78xxx NAND resource type should be IORESOURCE_MEM The type was IORESOURCE_IO which is not what is expected by plat_nand_probe(). This device has not worked since 2d098a72 ("mtd: plat_nand: request memory resource before doing ioremap"). Signed-off-by: Michael Spang Signed-off-by: Nicolas Pitre --- arch/arm/mach-orion5x/ts78xx-setup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c index 696b1a97f9e2..9a5d1ef1bd1f 100644 --- a/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/arch/arm/mach-orion5x/ts78xx-setup.c @@ -239,7 +239,7 @@ static struct platform_nand_data ts78xx_ts_nand_data = { static struct resource ts78xx_ts_nand_resources = { .start = TS_NAND_DATA, .end = TS_NAND_DATA + 4, - .flags = IORESOURCE_IO, + .flags = IORESOURCE_MEM, }; static struct platform_device ts78xx_ts_nand_device = { From 7350f419724fd9472d3b5cc521538713f9797b62 Mon Sep 17 00:00:00 2001 From: Mike Rapoport Date: Wed, 3 Nov 2010 17:22:00 +0200 Subject: [PATCH 09/18] ARM: orion5x/kirkwood/mv78xx0: fix MPP configuration corner cases Wrong MPP configuration would cause _mpp_conf loop infinitely because the mpp list iterator would not be incremented. Signed-off-by: Mike Rapoport Signed-off-by: Nicolas Pitre --- arch/arm/mach-kirkwood/mpp.c | 4 +--- arch/arm/mach-mv78xx0/mpp.c | 4 +--- arch/arm/mach-orion5x/mpp.c | 4 +--- 3 files changed, 3 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-kirkwood/mpp.c b/arch/arm/mach-kirkwood/mpp.c index 065187d177c6..27901f702feb 100644 --- a/arch/arm/mach-kirkwood/mpp.c +++ b/arch/arm/mach-kirkwood/mpp.c @@ -59,7 +59,7 @@ void __init kirkwood_mpp_conf(unsigned int *mpp_list) } printk("\n"); - while (*mpp_list) { + for ( ; *mpp_list; mpp_list++) { unsigned int num = MPP_NUM(*mpp_list); unsigned int sel = MPP_SEL(*mpp_list); int shift, gpio_mode; @@ -88,8 +88,6 @@ void __init kirkwood_mpp_conf(unsigned int *mpp_list) if (sel != 0) gpio_mode = 0; orion_gpio_set_valid(num, gpio_mode); - - mpp_list++; } printk(KERN_DEBUG " final MPP regs:"); diff --git a/arch/arm/mach-mv78xx0/mpp.c b/arch/arm/mach-mv78xx0/mpp.c index 354ac514eb89..84db2dfc475c 100644 --- a/arch/arm/mach-mv78xx0/mpp.c +++ b/arch/arm/mach-mv78xx0/mpp.c @@ -54,7 +54,7 @@ void __init mv78xx0_mpp_conf(unsigned int *mpp_list) } printk("\n"); - while (*mpp_list) { + for ( ; *mpp_list; mpp_list++) { unsigned int num = MPP_NUM(*mpp_list); unsigned int sel = MPP_SEL(*mpp_list); int shift, gpio_mode; @@ -83,8 +83,6 @@ void __init mv78xx0_mpp_conf(unsigned int *mpp_list) if (sel != 0) gpio_mode = 0; orion_gpio_set_valid(num, gpio_mode); - - mpp_list++; } printk(KERN_DEBUG " final MPP regs:"); diff --git a/arch/arm/mach-orion5x/mpp.c b/arch/arm/mach-orion5x/mpp.c index bc4c3b9aaf83..db485d3b8144 100644 --- a/arch/arm/mach-orion5x/mpp.c +++ b/arch/arm/mach-orion5x/mpp.c @@ -127,7 +127,7 @@ void __init orion5x_mpp_conf(struct orion5x_mpp_mode *mode) /* Initialize gpiolib. */ orion_gpio_init(); - while (mode->mpp >= 0) { + for ( ; mode->mpp >= 0; mode++) { u32 *reg; int num_type; int shift; @@ -160,8 +160,6 @@ void __init orion5x_mpp_conf(struct orion5x_mpp_mode *mode) orion_gpio_set_unused(mode->mpp); orion_gpio_set_valid(mode->mpp, !!(mode->type == MPP_GPIO)); - - mode++; } writel(mpp_0_7_ctrl, MPP_0_7_CTRL); From c947f69fff183e5d2a06160d9262b5dab7359e95 Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 3 Nov 2010 16:00:15 +0000 Subject: [PATCH 10/18] ARM: Fix DMA coherent allocator alignment MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit An out by one bug meant that the DMA coherent allocator was aligning to one more bit than it should, causing it to run out of available memory quicker. Fix this. Reported-by: Petr Štetiar Signed-off-by: Russell King --- arch/arm/mm/dma-mapping.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index e4dd0646e859..ac6a36142fcd 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -198,7 +198,7 @@ __dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot) * fragmentation of the DMA space, and also prevents allocations * smaller than a section from crossing a section boundary. */ - bit = fls(size - 1) + 1; + bit = fls(size - 1); if (bit > SECTION_SHIFT) bit = SECTION_SHIFT; align = 1 << bit; From d33aadbf8e9ba0b844c2a4a03723969c913ab03a Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Thu, 4 Nov 2010 18:22:51 +0100 Subject: [PATCH 11/18] ARM: 6468/1: backtrace: fix calculation of thread stack base When unwinding stack frames we must take care not to unwind areas of memory that lie outside of the known extent of the stack. This patch fixes an incorrect calculation of the stack base where THREAD_SIZE is added to the stack pointer after it has already been aligned to this value. Since the ALIGN macro performs this addition internally, we end up overshooting the base by 8k. Acked-by: Catalin Marinas Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/kernel/stacktrace.c | 2 +- arch/arm/kernel/unwind.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/kernel/stacktrace.c b/arch/arm/kernel/stacktrace.c index 20b7411e47fd..c2e112e1a05f 100644 --- a/arch/arm/kernel/stacktrace.c +++ b/arch/arm/kernel/stacktrace.c @@ -28,7 +28,7 @@ int notrace unwind_frame(struct stackframe *frame) /* only go to a higher address on the stack */ low = frame->sp; - high = ALIGN(low, THREAD_SIZE) + THREAD_SIZE; + high = ALIGN(low, THREAD_SIZE); /* check current frame pointer is within bounds */ if (fp < (low + 12) || fp + 4 >= high) diff --git a/arch/arm/kernel/unwind.c b/arch/arm/kernel/unwind.c index 2a161765f6d5..d2cb0b3c9872 100644 --- a/arch/arm/kernel/unwind.c +++ b/arch/arm/kernel/unwind.c @@ -279,7 +279,7 @@ int unwind_frame(struct stackframe *frame) /* only go to a higher address on the stack */ low = frame->sp; - high = ALIGN(low, THREAD_SIZE) + THREAD_SIZE; + high = ALIGN(low, THREAD_SIZE); pr_debug("%s(pc = %08lx lr = %08lx sp = %08lx)\n", __func__, frame->pc, frame->lr, frame->sp); From c3b291d98878a5f25fee56255bcfa420e85dff59 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Thu, 4 Nov 2010 18:23:50 +0100 Subject: [PATCH 12/18] ARM: 6469/1: perf-events: squash compiler warning armv7_pmnc_counter_has_overflowed can return uninitialised data if an invalid counter is specified. This patch fixes the code to return 0 in this case, which squashes the compiler warning from GCC 4.5. Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/kernel/perf_event.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c index 49643b1467e6..07a50357492a 100644 --- a/arch/arm/kernel/perf_event.c +++ b/arch/arm/kernel/perf_event.c @@ -1749,7 +1749,7 @@ static inline int armv7_pmnc_has_overflowed(unsigned long pmnc) static inline int armv7_pmnc_counter_has_overflowed(unsigned long pmnc, enum armv7_counters counter) { - int ret; + int ret = 0; if (counter == ARMV7_CYCLE_COUNTER) ret = pmnc & ARMV7_FLAG_C; From d4c7b1f9b41b76f6e794fdc4043f1903809e84d9 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Thu, 4 Nov 2010 18:24:22 +0100 Subject: [PATCH 13/18] ARM: 6470/1: atomic64: use generic implementation for OABI configurations The old apcs-gnu ABI doesn't guarantee that double words are allocated to registers with even alignment, causing the 64-bit exclusive memory operations to be rejected by the assembler. This patch requires that CONFIG_AEABI is set in order to use the native atomic operations and falls back to the generic (spinlock) code otherwise. Acked-by: Nicolas Pitre Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index a19a5266d5fc..8ae3d48d504c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -6,7 +6,7 @@ config ARM select HAVE_MEMBLOCK select RTC_LIB select SYS_SUPPORTS_APM_EMULATION - select GENERIC_ATOMIC64 if (!CPU_32v6K) + select GENERIC_ATOMIC64 if (!CPU_32v6K || !AEABI) select HAVE_OPROFILE if (HAVE_PERF_EVENTS) select HAVE_ARCH_KGDB select HAVE_KPROBES if (!XIP_KERNEL) From 85d988fcff5a7e35df0d0fb0c581470f4b72a3de Mon Sep 17 00:00:00 2001 From: Ryan Mallon Date: Tue, 19 Oct 2010 21:14:55 +0100 Subject: [PATCH 14/18] ARM: 6462/1: EP93xx: Document DMA M2P API Add kernel-doc documentation for the EP93xx DMA memory to peripheral/peripheral to memory API. Signed-off-by: Ryan Mallon Acked-by: Mika Westerberg Signed-off-by: Russell King --- arch/arm/mach-ep93xx/include/mach/dma.h | 111 ++++++++++++++++++++++-- 1 file changed, 102 insertions(+), 9 deletions(-) diff --git a/arch/arm/mach-ep93xx/include/mach/dma.h b/arch/arm/mach-ep93xx/include/mach/dma.h index 3a5961d3f3b1..5e31b2b25da9 100644 --- a/arch/arm/mach-ep93xx/include/mach/dma.h +++ b/arch/arm/mach-ep93xx/include/mach/dma.h @@ -1,5 +1,13 @@ -/* - * arch/arm/mach-ep93xx/include/mach/dma.h +/** + * DOC: EP93xx DMA M2P memory to peripheral and peripheral to memory engine + * + * The EP93xx DMA M2P subsystem handles DMA transfers between memory and + * peripherals. DMA M2P channels are available for audio, UARTs and IrDA. + * See chapter 10 of the EP93xx users guide for full details on the DMA M2P + * engine. + * + * See sound/soc/ep93xx/ep93xx-pcm.c for an example use of the DMA M2P code. + * */ #ifndef __ASM_ARCH_DMA_H @@ -8,12 +16,34 @@ #include #include +/** + * struct ep93xx_dma_buffer - Information about a buffer to be transferred + * using the DMA M2P engine + * + * @list: Entry in DMA buffer list + * @bus_addr: Physical address of the buffer + * @size: Size of the buffer in bytes + */ struct ep93xx_dma_buffer { struct list_head list; u32 bus_addr; u16 size; }; +/** + * struct ep93xx_dma_m2p_client - Information about a DMA M2P client + * + * @name: Unique name for this client + * @flags: Client flags + * @cookie: User data to pass to callback functions + * @buffer_started: Non NULL function to call when a transfer is started. + * The arguments are the user data cookie and the DMA + * buffer which is starting. + * @buffer_finished: Non NULL function to call when a transfer is completed. + * The arguments are the user data cookie, the DMA buffer + * which has completed, and a boolean flag indicating if + * the transfer had an error. + */ struct ep93xx_dma_m2p_client { char *name; u8 flags; @@ -24,10 +54,11 @@ struct ep93xx_dma_m2p_client { struct ep93xx_dma_buffer *buf, int bytes, int error); - /* Internal to the DMA code. */ + /* private: Internal use only */ void *channel; }; +/* DMA M2P ports */ #define EP93XX_DMA_M2P_PORT_I2S1 0x00 #define EP93XX_DMA_M2P_PORT_I2S2 0x01 #define EP93XX_DMA_M2P_PORT_AAC1 0x02 @@ -39,18 +70,80 @@ struct ep93xx_dma_m2p_client { #define EP93XX_DMA_M2P_PORT_UART3 0x08 #define EP93XX_DMA_M2P_PORT_IRDA 0x09 #define EP93XX_DMA_M2P_PORT_MASK 0x0f -#define EP93XX_DMA_M2P_TX 0x00 -#define EP93XX_DMA_M2P_RX 0x10 -#define EP93XX_DMA_M2P_ABORT_ON_ERROR 0x20 -#define EP93XX_DMA_M2P_IGNORE_ERROR 0x40 -#define EP93XX_DMA_M2P_ERROR_MASK 0x60 -int ep93xx_dma_m2p_client_register(struct ep93xx_dma_m2p_client *m2p); +/* DMA M2P client flags */ +#define EP93XX_DMA_M2P_TX 0x00 /* Memory to peripheral */ +#define EP93XX_DMA_M2P_RX 0x10 /* Peripheral to memory */ + +/* + * DMA M2P client error handling flags. See the EP93xx users guide + * documentation on the DMA M2P CONTROL register for more details + */ +#define EP93XX_DMA_M2P_ABORT_ON_ERROR 0x20 /* Abort on peripheral error */ +#define EP93XX_DMA_M2P_IGNORE_ERROR 0x40 /* Ignore peripheral errors */ +#define EP93XX_DMA_M2P_ERROR_MASK 0x60 /* Mask of error bits */ + +/** + * ep93xx_dma_m2p_client_register - Register a client with the DMA M2P + * subsystem + * + * @m2p: Client information to register + * returns 0 on success + * + * The DMA M2P subsystem allocates a channel and an interrupt line for the DMA + * client + */ +int ep93xx_dma_m2p_client_register(struct ep93xx_dma_m2p_client *m2p); + +/** + * ep93xx_dma_m2p_client_unregister - Unregister a client from the DMA M2P + * subsystem + * + * @m2p: Client to unregister + * + * Any transfers currently in progress will be completed in hardware, but + * ignored in software. + */ void ep93xx_dma_m2p_client_unregister(struct ep93xx_dma_m2p_client *m2p); + +/** + * ep93xx_dma_m2p_submit - Submit a DMA M2P transfer + * + * @m2p: DMA Client to submit the transfer on + * @buf: DMA Buffer to submit + * + * If the current or next transfer positions are free on the M2P client then + * the transfer is started immediately. If not, the transfer is added to the + * list of pending transfers. This function must not be called from the + * buffer_finished callback for an M2P channel. + * + */ void ep93xx_dma_m2p_submit(struct ep93xx_dma_m2p_client *m2p, struct ep93xx_dma_buffer *buf); + +/** + * ep93xx_dma_m2p_submit_recursive - Put a DMA transfer on the pending list + * for an M2P channel + * + * @m2p: DMA Client to submit the transfer on + * @buf: DMA Buffer to submit + * + * This function must only be called from the buffer_finished callback for an + * M2P channel. It is commonly used to add the next transfer in a chained list + * of DMA transfers. + */ void ep93xx_dma_m2p_submit_recursive(struct ep93xx_dma_m2p_client *m2p, struct ep93xx_dma_buffer *buf); + +/** + * ep93xx_dma_m2p_flush - Flush all pending transfers on a DMA M2P client + * + * @m2p: DMA client to flush transfers on + * + * Any transfers currently in progress will be completed in hardware, but + * ignored in software. + * + */ void ep93xx_dma_m2p_flush(struct ep93xx_dma_m2p_client *m2p); #endif /* __ASM_ARCH_DMA_H */ From 235584b6f3b71bc1381be13a963a16f7107650cf Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Sat, 30 Oct 2010 14:21:24 -0700 Subject: [PATCH 15/18] ARM: arch/arm/kernel/hw_breakpoint.c: Convert WARN_ON to WARN Message isn't printed by WARN_ON. Signed-off-by: Joe Perches Signed-off-by: Russell King --- arch/arm/kernel/hw_breakpoint.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c index 54593b0c241b..21e3a4ab3b8c 100644 --- a/arch/arm/kernel/hw_breakpoint.c +++ b/arch/arm/kernel/hw_breakpoint.c @@ -748,8 +748,7 @@ static int hw_breakpoint_pending(unsigned long addr, unsigned int fsr, breakpoint_handler(addr, regs); break; case ARM_ENTRY_ASYNC_WATCHPOINT: - WARN_ON("Asynchronous watchpoint exception taken. " - "Debugging results may be unreliable"); + WARN(1, "Asynchronous watchpoint exception taken. Debugging results may be unreliable\n"); case ARM_ENTRY_SYNC_WATCHPOINT: watchpoint_handler(addr, regs); break; From 69448c2a4d23e5883cbca21a173e3eb89f095746 Mon Sep 17 00:00:00 2001 From: Joe Perches Date: Fri, 5 Nov 2010 16:12:34 -0700 Subject: [PATCH 16/18] ARM: arch/arm/kernel/traps.c: Convert sprintf_symbol to %pS Signed-off-by: Joe Perches Signed-off-by: Russell King --- arch/arm/kernel/traps.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/arch/arm/kernel/traps.c b/arch/arm/kernel/traps.c index cda78d59aa31..446aee97436f 100644 --- a/arch/arm/kernel/traps.c +++ b/arch/arm/kernel/traps.c @@ -53,10 +53,7 @@ static void dump_mem(const char *, const char *, unsigned long, unsigned long); void dump_backtrace_entry(unsigned long where, unsigned long from, unsigned long frame) { #ifdef CONFIG_KALLSYMS - char sym1[KSYM_SYMBOL_LEN], sym2[KSYM_SYMBOL_LEN]; - sprint_symbol(sym1, where); - sprint_symbol(sym2, from); - printk("[<%08lx>] (%s) from [<%08lx>] (%s)\n", where, sym1, from, sym2); + printk("[<%08lx>] (%pS) from [<%08lx>] (%pS)\n", where, (void *)where, from, (void *)from); #else printk("Function entered at [<%08lx>] from [<%08lx>]\n", where, from); #endif From e56c010f0d08bbecd05074eded7805d555da29b6 Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Wed, 10 Nov 2010 15:59:11 +0100 Subject: [PATCH 17/18] ARM: 6472/1: vexpress ct-ca9x4: only set twd_base if local timers are being used In commit bde28b84, I made the assumption that CONFIG_SMP is always set for the quad-core ct-ca9x4 platform. As it turns out, people who aren't using the SMP goodness are confronted with a build failure. This patch fixes this issue by ensure that twd_base is only set if local timers are being used (and therefore SMP support is configured). Reported-by: Nicolas Pitre Signed-off-by: Will Deacon Signed-off-by: Russell King --- arch/arm/mach-vexpress/ct-ca9x4.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/mach-vexpress/ct-ca9x4.c b/arch/arm/mach-vexpress/ct-ca9x4.c index c2e405a9e025..fd25ccd7272f 100644 --- a/arch/arm/mach-vexpress/ct-ca9x4.c +++ b/arch/arm/mach-vexpress/ct-ca9x4.c @@ -54,7 +54,9 @@ static struct map_desc ct_ca9x4_io_desc[] __initdata = { static void __init ct_ca9x4_map_io(void) { +#ifdef CONFIG_LOCAL_TIMERS twd_base = MMIO_P2V(A9_MPCORE_TWD); +#endif v2m_map_io(ct_ca9x4_io_desc, ARRAY_SIZE(ct_ca9x4_io_desc)); } From 9395f6ea3c61d80ccc7a13668d27afbb8d9436ba Mon Sep 17 00:00:00 2001 From: Russell King Date: Thu, 11 Nov 2010 23:10:30 +0000 Subject: [PATCH 18/18] ARM: GIC: don't disable software generated interrupts Software generated interrupts (SGI) are used for IPIs by the kernel. While previous revisions of the GIC hardware were specified not to implement enable bits for SGIs, more recent hardware is now permitted to implement these bits in a per-CPU banked register. The priority registers for the PPI and SGIs are also per-CPU banked registers, so ensure that these are also appropriately initialized. Reported-by: Scott Valentine Acked-by: Abhijeet Dharmapurikar Acked-by: Catalin Marinas Signed-off-by: Russell King --- arch/arm/common/gic.c | 28 ++++++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index ada6359160eb..772f95f1aecd 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -251,15 +251,16 @@ void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, writel(cpumask, base + GIC_DIST_TARGET + i * 4 / 4); /* - * Set priority on all interrupts. + * Set priority on all global interrupts. */ - for (i = 0; i < max_irq; i += 4) + for (i = 32; i < max_irq; i += 4) writel(0xa0a0a0a0, base + GIC_DIST_PRI + i * 4 / 4); /* - * Disable all interrupts. + * Disable all interrupts. Leave the PPI and SGIs alone + * as these enables are banked registers. */ - for (i = 0; i < max_irq; i += 32) + for (i = 32; i < max_irq; i += 32) writel(0xffffffff, base + GIC_DIST_ENABLE_CLEAR + i * 4 / 32); /* @@ -277,11 +278,30 @@ void __init gic_dist_init(unsigned int gic_nr, void __iomem *base, void __cpuinit gic_cpu_init(unsigned int gic_nr, void __iomem *base) { + void __iomem *dist_base; + int i; + if (gic_nr >= MAX_GIC_NR) BUG(); + dist_base = gic_data[gic_nr].dist_base; + BUG_ON(!dist_base); + gic_data[gic_nr].cpu_base = base; + /* + * Deal with the banked PPI and SGI interrupts - disable all + * PPI interrupts, ensure all SGI interrupts are enabled. + */ + writel(0xffff0000, dist_base + GIC_DIST_ENABLE_CLEAR); + writel(0x0000ffff, dist_base + GIC_DIST_ENABLE_SET); + + /* + * Set priority on PPI and SGI interrupts + */ + for (i = 0; i < 32; i += 4) + writel(0xa0a0a0a0, dist_base + GIC_DIST_PRI + i * 4 / 4); + writel(0xf0, base + GIC_CPU_PRIMASK); writel(1, base + GIC_CPU_CTRL); }