pinctrl: pic32: Convert to immutable irq_chip

Convert the driver to immutable irq-chip with a bit of
intuition. Switch some call to use irqd_to_hwirq() in the
process.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20230414-immutable-irqchips-2-v1-1-6b59a5186b00@linaro.org
This commit is contained in:
Linus Walleij 2023-04-14 16:06:17 +02:00
parent df60325839
commit a0a53f1bf1

View File

@ -17,6 +17,7 @@
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
#include <linux/platform_device.h>
#include <linux/seq_file.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
@ -60,8 +61,8 @@ struct pic32_desc_function {
struct pic32_gpio_bank {
void __iomem *reg_base;
int instance;
struct gpio_chip gpio_chip;
struct irq_chip irq_chip;
struct clk *clk;
};
@ -2008,12 +2009,14 @@ static void pic32_gpio_irq_mask(struct irq_data *data)
struct pic32_gpio_bank *bank = irqd_to_bank(data);
writel(BIT(PIC32_CNCON_ON), bank->reg_base + PIC32_CLR(CNCON_REG));
gpiochip_disable_irq(&bank->gpio_chip, irqd_to_hwirq(data));
}
static void pic32_gpio_irq_unmask(struct irq_data *data)
{
struct pic32_gpio_bank *bank = irqd_to_bank(data);
gpiochip_enable_irq(&bank->gpio_chip, irqd_to_hwirq(data));
writel(BIT(PIC32_CNCON_ON), bank->reg_base + PIC32_SET(CNCON_REG));
}
@ -2030,7 +2033,7 @@ static unsigned int pic32_gpio_irq_startup(struct irq_data *data)
static int pic32_gpio_irq_set_type(struct irq_data *data, unsigned int type)
{
struct pic32_gpio_bank *bank = irqd_to_bank(data);
u32 mask = BIT(data->hwirq);
u32 mask = irqd_to_hwirq(data);
switch (type & IRQ_TYPE_SENSE_MASK) {
case IRQ_TYPE_EDGE_RISING:
@ -2122,14 +2125,7 @@ static void pic32_gpio_irq_handler(struct irq_desc *desc)
.owner = THIS_MODULE, \
.can_sleep = 0, \
}, \
.irq_chip = { \
.name = "GPIO" #_bank, \
.irq_startup = pic32_gpio_irq_startup, \
.irq_ack = pic32_gpio_irq_ack, \
.irq_mask = pic32_gpio_irq_mask, \
.irq_unmask = pic32_gpio_irq_unmask, \
.irq_set_type = pic32_gpio_irq_set_type, \
}, \
.instance = (_bank), \
}
static struct pic32_gpio_bank pic32_gpio_banks[] = {
@ -2145,6 +2141,24 @@ static struct pic32_gpio_bank pic32_gpio_banks[] = {
GPIO_BANK(9, PINS_PER_BANK),
};
static void pic32_gpio_irq_print_chip(struct irq_data *data, struct seq_file *p)
{
struct pic32_gpio_bank *bank = irqd_to_bank(data);
seq_printf(p, "GPIO%d", bank->instance);
}
static const struct irq_chip pic32_gpio_irq_chip = {
.irq_startup = pic32_gpio_irq_startup,
.irq_ack = pic32_gpio_irq_ack,
.irq_mask = pic32_gpio_irq_mask,
.irq_unmask = pic32_gpio_irq_unmask,
.irq_set_type = pic32_gpio_irq_set_type,
.irq_print_chip = pic32_gpio_irq_print_chip,
.flags = IRQCHIP_IMMUTABLE,
GPIOCHIP_IRQ_RESOURCE_HELPERS,
};
static int pic32_pinctrl_probe(struct platform_device *pdev)
{
struct pic32_pinctrl *pctl;
@ -2243,7 +2257,7 @@ static int pic32_gpio_probe(struct platform_device *pdev)
bank->gpio_chip.parent = &pdev->dev;
girq = &bank->gpio_chip.irq;
girq->chip = &bank->irq_chip;
gpio_irq_chip_set_chip(girq, &pic32_gpio_irq_chip);
girq->parent_handler = pic32_gpio_irq_handler;
girq->num_parents = 1;
girq->parents = devm_kcalloc(&pdev->dev, 1, sizeof(*girq->parents),