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arm64: dts: rockchip: assign default rates for core rk3399 clocks
These clocks are all core clocks used by many blocks/peripherals, many of whose drivers don't set their clock rates at all. Let's assign reasonable default clock rates for these core clocks, so that these peripherals get something reasonable by default, and also so that if child devices want to select a clock rate themselves, their muxes have some reasonable parent clock rates to branch off of (rather than just the boot-time defaults). This helps the eMMC PHY, for one, to get a reasonable ACLK rate. Signed-off-by: Xing Zheng <zhengxing@rock-chips.com> Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -478,6 +478,22 @@
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reg = <0x0 0xff760000 0x0 0x1000>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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assigned-clocks =
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<&cru PLL_GPLL>, <&cru PLL_CPLL>,
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<&cru PLL_NPLL>,
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<&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>,
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<&cru PCLK_PERIHP>,
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<&cru ACLK_PERILP0>, <&cru HCLK_PERILP0>,
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<&cru PCLK_PERILP0>,
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<&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>;
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assigned-clock-rates =
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<594000000>, <800000000>,
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<1000000000>,
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<150000000>, <75000000>,
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<37500000>,
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<100000000>, <100000000>,
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<50000000>,
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<100000000>, <50000000>;
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};
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grf: syscon@ff770000 {
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