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tile: use standard tile_bundle_bits type in traps.c

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We were rolling our own bundle_bits, which is unnecessary.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
This commit is contained in:
Chris Metcalf 2013-08-13 15:33:53 -04:00
parent 43b7f2fb58
commit a0099303cd
1 changed files with 3 additions and 9 deletions
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12
arch/tile/kernel/traps.c
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@ -101,13 +101,7 @@ static int retry_gpv(unsigned int gpv_reason)
#endif /* CHIP_HAS_TILE_DMA() */
#ifdef __tilegx__
#define bundle_bits tilegx_bundle_bits
#else
#define bundle_bits tile_bundle_bits
#endif
extern bundle_bits bpt_code;
extern tile_bundle_bits bpt_code;
asm(".pushsection .rodata.bpt_code,\"a\";"
".align 8;"
@ -115,7 +109,7 @@ asm(".pushsection .rodata.bpt_code,\"a\";"
".size bpt_code,.-bpt_code;"
".popsection");
static int special_ill(bundle_bits bundle, int *sigp, int *codep)
static int special_ill(tile_bundle_bits bundle, int *sigp, int *codep)
{
int sig, code, maxcode;
@ -263,7 +257,7 @@ void __kprobes do_trap(struct pt_regs *regs, int fault_num,
siginfo_t info = { 0 };
int signo, code;
unsigned long address = 0;
bundle_bits instr;
tile_bundle_bits instr;
int is_kernel = !user_mode(regs);
/* Handle breakpoints, etc. */