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ASoC: SOF: Intel: hda: make DSPless mode work with DSP disabled in BIOS
When the DSP is disabled in the BIOS, the DSP_BAR and PP_BAR cannot be accessed. One possible objection noted in initial reviews is that this patch adds a number of branches. However the number of branches is actually limited in probe/suspend/resume routines mostly, so there isn't really a degradation in terms of readability and maintainability. Adding yet another level of abstraction/ops/callbacks would increase complexity and not really help in terms of code reuse or readability and maintainability. A split between controller and DSP driver would be even more invasive. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@linux.intel.com> Link: https://lore.kernel.org/r/20230404092115.27949-7-peter.ujfalusi@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Pierre-Louis Bossart
Mark Brown
parent
1f7b5d52be
commit
9fc6786f54
@ -321,6 +321,9 @@ void hda_dsp_ipc_int_enable(struct snd_sof_dev *sdev)
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struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
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const struct sof_intel_dsp_desc *chip = hda->desc;
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if (sdev->dspless_mode_selected)
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return;
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/* enable IPC DONE and BUSY interrupts */
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snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, chip->ipc_ctl,
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HDA_DSP_REG_HIPCCTL_DONE | HDA_DSP_REG_HIPCCTL_BUSY,
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@ -336,6 +339,9 @@ void hda_dsp_ipc_int_disable(struct snd_sof_dev *sdev)
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struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata;
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const struct sof_intel_dsp_desc *chip = hda->desc;
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if (sdev->dspless_mode_selected)
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return;
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/* disable IPC interrupt */
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snd_sof_dsp_update_bits(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIC,
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HDA_DSP_ADSPIC_IPC, 0);
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@ -681,6 +687,9 @@ static int hda_suspend(struct snd_sof_dev *sdev, bool runtime_suspend)
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/* power down all hda links */
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hda_bus_ml_suspend(bus);
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if (sdev->dspless_mode_selected)
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goto skip_dsp;
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ret = chip->power_down_dsp(sdev);
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if (ret < 0) {
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dev_err(sdev->dev, "failed to power down DSP during suspend\n");
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@ -694,6 +703,7 @@ static int hda_suspend(struct snd_sof_dev *sdev, bool runtime_suspend)
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/* disable ppcap interrupt */
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hda_dsp_ctrl_ppcap_enable(sdev, false);
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hda_dsp_ctrl_ppcap_int_enable(sdev, false);
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skip_dsp:
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/* disable hda bus irq and streams */
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hda_dsp_ctrl_stop_chip(sdev);
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@ -744,9 +754,11 @@ static int hda_resume(struct snd_sof_dev *sdev, bool runtime_resume)
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hda_codec_jack_check(sdev);
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}
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if (!sdev->dspless_mode_selected) {
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/* enable ppcap interrupt */
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hda_dsp_ctrl_ppcap_enable(sdev, true);
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hda_dsp_ctrl_ppcap_int_enable(sdev, true);
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}
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cleanup:
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/* display codec can powered off after controller init */
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@ -843,8 +855,10 @@ int hda_dsp_runtime_suspend(struct snd_sof_dev *sdev)
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};
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int ret;
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if (!sdev->dspless_mode_selected) {
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/* cancel any attempt for DSP D0I3 */
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cancel_delayed_work_sync(&hda->d0i3_work);
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}
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/* stop hda controller and power dsp off */
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ret = hda_suspend(sdev, true);
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@ -866,8 +880,10 @@ int hda_dsp_suspend(struct snd_sof_dev *sdev, u32 target_state)
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};
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int ret;
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if (!sdev->dspless_mode_selected) {
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/* cancel any attempt for DSP D0I3 */
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cancel_delayed_work_sync(&hda->d0i3_work);
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}
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if (target_state == SOF_DSP_PM_D0) {
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/* Set DSP power state */
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@ -355,6 +355,9 @@ bool hda_dsp_check_ipc_irq(struct snd_sof_dev *sdev)
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bool ret = false;
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u32 irq_status;
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if (sdev->dspless_mode_selected)
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return false;
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/* store status */
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irq_status = snd_sof_dsp_read(sdev, HDA_DSP_BAR, HDA_DSP_REG_ADSPIS);
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trace_sof_intel_hda_irq_ipc_check(sdev, irq_status);
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@ -874,12 +874,14 @@ int hda_dsp_stream_init(struct snd_sof_dev *sdev)
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hext_stream = &hda_stream->hext_stream;
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if (sdev->bar[HDA_DSP_PP_BAR]) {
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hext_stream->pphc_addr = sdev->bar[HDA_DSP_PP_BAR] +
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SOF_HDA_PPHC_BASE + SOF_HDA_PPHC_INTERVAL * i;
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hext_stream->pplc_addr = sdev->bar[HDA_DSP_PP_BAR] +
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SOF_HDA_PPLC_BASE + SOF_HDA_PPLC_MULTI * num_total +
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SOF_HDA_PPLC_INTERVAL * i;
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}
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hstream = &hext_stream->hstream;
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@ -930,13 +932,14 @@ int hda_dsp_stream_init(struct snd_sof_dev *sdev)
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hext_stream = &hda_stream->hext_stream;
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/* we always have DSP support */
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if (sdev->bar[HDA_DSP_PP_BAR]) {
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hext_stream->pphc_addr = sdev->bar[HDA_DSP_PP_BAR] +
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SOF_HDA_PPHC_BASE + SOF_HDA_PPHC_INTERVAL * i;
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hext_stream->pplc_addr = sdev->bar[HDA_DSP_PP_BAR] +
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SOF_HDA_PPLC_BASE + SOF_HDA_PPLC_MULTI * num_total +
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SOF_HDA_PPLC_INTERVAL * i;
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}
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hstream = &hext_stream->hstream;
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@ -122,8 +122,12 @@ void hda_common_enable_sdw_irq(struct snd_sof_dev *sdev, bool enable)
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void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable)
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{
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u32 interface_mask = hda_get_interface_mask(sdev);
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const struct sof_intel_dsp_desc *chip;
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if (!(interface_mask & BIT(SOF_DAI_INTEL_ALH)))
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return;
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chip = get_chip_info(sdev->pdata);
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if (chip && chip->enable_sdw_irq)
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chip->enable_sdw_irq(sdev, enable);
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@ -131,10 +135,14 @@ void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable)
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static int hda_sdw_acpi_scan(struct snd_sof_dev *sdev)
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{
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u32 interface_mask = hda_get_interface_mask(sdev);
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struct sof_intel_hda_dev *hdev;
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acpi_handle handle;
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int ret;
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if (!(interface_mask & BIT(SOF_DAI_INTEL_ALH)))
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return -EINVAL;
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handle = ACPI_HANDLE(sdev->dev);
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/* save ACPI info for the probe step */
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@ -288,8 +296,12 @@ out:
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static bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev)
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{
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u32 interface_mask = hda_get_interface_mask(sdev);
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const struct sof_intel_dsp_desc *chip;
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if (!(interface_mask & BIT(SOF_DAI_INTEL_ALH)))
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return false;
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chip = get_chip_info(sdev->pdata);
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if (chip && chip->check_sdw_irq)
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return chip->check_sdw_irq(sdev);
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@ -304,8 +316,12 @@ static irqreturn_t hda_dsp_sdw_thread(int irq, void *context)
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static bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev)
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{
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u32 interface_mask = hda_get_interface_mask(sdev);
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struct sof_intel_hda_dev *hdev;
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if (!(interface_mask & BIT(SOF_DAI_INTEL_ALH)))
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return false;
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hdev = sdev->pdata->hw_pdata;
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if (hdev->sdw &&
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snd_sof_dsp_read(sdev, HDA_DSP_BAR,
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@ -317,8 +333,12 @@ static bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev)
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void hda_sdw_process_wakeen(struct snd_sof_dev *sdev)
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{
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u32 interface_mask = hda_get_interface_mask(sdev);
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struct sof_intel_hda_dev *hdev;
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if (!(interface_mask & BIT(SOF_DAI_INTEL_ALH)))
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return;
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hdev = sdev->pdata->hw_pdata;
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if (!hdev->sdw)
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return;
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@ -1010,6 +1030,7 @@ int hda_dsp_probe(struct snd_sof_dev *sdev)
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const struct sof_intel_dsp_desc *chip;
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int ret = 0;
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if (!sdev->dspless_mode_selected) {
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/*
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* detect DSP by checking class/subclass/prog-id information
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* class=04 subclass 03 prog-if 00: no DSP, legacy driver is required
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@ -1018,13 +1039,16 @@ int hda_dsp_probe(struct snd_sof_dev *sdev)
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* class=04 subclass 03 prog-if 80: either of DSP or legacy mode works
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*/
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if (pci->class == 0x040300) {
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dev_err(sdev->dev, "error: the DSP is not enabled on this platform, aborting probe\n");
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dev_err(sdev->dev, "the DSP is not enabled on this platform, aborting probe\n");
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return -ENODEV;
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} else if (pci->class != 0x040100 && pci->class != 0x040380) {
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dev_err(sdev->dev, "error: unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n", pci->class);
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dev_err(sdev->dev, "unknown PCI class/subclass/prog-if 0x%06x found, aborting probe\n",
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pci->class);
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return -ENODEV;
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}
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dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n", pci->class);
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dev_info(sdev->dev, "DSP detected with PCI class/subclass/prog-if 0x%06x\n",
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pci->class);
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}
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chip = get_chip_info(sdev->pdata);
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if (!chip) {
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@ -1069,6 +1093,9 @@ int hda_dsp_probe(struct snd_sof_dev *sdev)
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if (ret < 0)
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goto hdac_bus_unmap;
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if (sdev->dspless_mode_selected)
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goto skip_dsp_setup;
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/* DSP base */
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sdev->bar[HDA_DSP_BAR] = pci_ioremap_bar(pci, HDA_DSP_BAR);
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if (!sdev->bar[HDA_DSP_BAR]) {
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@ -1079,6 +1106,7 @@ int hda_dsp_probe(struct snd_sof_dev *sdev)
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sdev->mmio_bar = HDA_DSP_BAR;
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sdev->mailbox_bar = HDA_DSP_BAR;
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skip_dsp_setup:
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/* allow 64bit DMA address if supported by H/W */
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if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(64))) {
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@ -1144,6 +1172,7 @@ int hda_dsp_probe(struct snd_sof_dev *sdev)
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if (ret < 0)
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goto free_ipc_irq;
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if (!sdev->dspless_mode_selected) {
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/* enable ppcap interrupt */
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hda_dsp_ctrl_ppcap_enable(sdev, true);
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hda_dsp_ctrl_ppcap_int_enable(sdev, true);
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@ -1152,6 +1181,7 @@ int hda_dsp_probe(struct snd_sof_dev *sdev)
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sdev->dsp_box.offset = HDA_DSP_MBOX_UPLINK_OFFSET;
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INIT_DELAYED_WORK(&hdev->d0i3_work, hda_dsp_d0i3_work);
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}
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init_waitqueue_head(&hdev->waitq);
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@ -1167,6 +1197,7 @@ free_irq_vector:
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free_streams:
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hda_dsp_stream_free(sdev);
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/* dsp_unmap: not currently used */
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if (!sdev->dspless_mode_selected)
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iounmap(sdev->bar[HDA_DSP_BAR]);
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hdac_bus_unmap:
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platform_device_unregister(hdev->dmic_dev);
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@ -1187,6 +1218,7 @@ int hda_dsp_remove(struct snd_sof_dev *sdev)
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if (nhlt)
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intel_nhlt_free(nhlt);
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if (!sdev->dspless_mode_selected)
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/* cancel any attempt for DSP D0I3 */
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cancel_delayed_work_sync(&hda->d0i3_work);
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@ -1197,14 +1229,19 @@ int hda_dsp_remove(struct snd_sof_dev *sdev)
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if (!IS_ERR_OR_NULL(hda->dmic_dev))
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platform_device_unregister(hda->dmic_dev);
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if (!sdev->dspless_mode_selected) {
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/* disable DSP IRQ */
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snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
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SOF_HDA_PPCTL_PIE, 0);
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}
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/* disable CIE and GIE interrupts */
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snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, SOF_HDA_INTCTL,
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SOF_HDA_INT_CTRL_EN | SOF_HDA_INT_GLOBAL_EN, 0);
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if (sdev->dspless_mode_selected)
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goto skip_disable_dsp;
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/* no need to check for error as the DSP will be disabled anyway */
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if (chip && chip->power_down_dsp)
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chip->power_down_dsp(sdev);
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@ -1213,6 +1250,7 @@ int hda_dsp_remove(struct snd_sof_dev *sdev)
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snd_sof_dsp_update_bits(sdev, HDA_DSP_PP_BAR, SOF_HDA_REG_PP_PPCTL,
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SOF_HDA_PPCTL_GPROCEN, 0);
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skip_disable_dsp:
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free_irq(sdev->ipc_irq, sdev);
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if (sdev->msi_enabled)
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pci_free_irq_vectors(pci);
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@ -1221,7 +1259,9 @@ int hda_dsp_remove(struct snd_sof_dev *sdev)
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hda_bus_ml_free(sof_to_bus(sdev));
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if (!sdev->dspless_mode_selected)
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iounmap(sdev->bar[HDA_DSP_BAR]);
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iounmap(bus->remap_addr);
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sof_hda_bus_exit(sdev);
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