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ARM: S5PV210: Add sclk_dac, sclk_mixer and sclk_hdmi clocks
Add sclk_dac, sclk_mixer and sclk_hdmi clocks. These clocks are of type 'struct clksrc_clk' and so have a corresponding clock list. These clocks are also added to the list of clocks to be registered at boot time. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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@ -463,6 +463,67 @@ static struct clksrc_sources clkset_sclk_onenand = {
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.nr_sources = ARRAY_SIZE(clkset_sclk_onenand_list),
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};
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static struct clk *clkset_sclk_dac_list[] = {
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[0] = &clk_sclk_vpll.clk,
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[1] = &clk_sclk_hdmiphy,
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};
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static struct clksrc_sources clkset_sclk_dac = {
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.sources = clkset_sclk_dac_list,
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.nr_sources = ARRAY_SIZE(clkset_sclk_dac_list),
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};
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static struct clksrc_clk clk_sclk_dac = {
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.clk = {
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.name = "sclk_dac",
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.id = -1,
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.ctrlbit = (1 << 10),
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.enable = s5pv210_clk_ip1_ctrl,
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},
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.sources = &clkset_sclk_dac,
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.reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 1 },
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};
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static struct clksrc_clk clk_sclk_pixel = {
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.clk = {
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.name = "sclk_pixel",
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.id = -1,
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.parent = &clk_sclk_vpll.clk,
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},
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.reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 4},
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};
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static struct clk *clkset_sclk_hdmi_list[] = {
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[0] = &clk_sclk_pixel.clk,
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[1] = &clk_sclk_hdmiphy,
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};
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static struct clksrc_sources clkset_sclk_hdmi = {
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.sources = clkset_sclk_hdmi_list,
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.nr_sources = ARRAY_SIZE(clkset_sclk_hdmi_list),
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};
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static struct clksrc_clk clk_sclk_hdmi = {
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.clk = {
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.name = "sclk_hdmi",
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.id = -1,
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.enable = s5pv210_clk_ip1_ctrl,
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.ctrlbit = (1 << 11),
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},
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.sources = &clkset_sclk_hdmi,
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.reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 1 },
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};
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static struct clk *clkset_sclk_mixer_list[] = {
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[0] = &clk_sclk_dac.clk,
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[1] = &clk_sclk_hdmi.clk,
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};
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static struct clksrc_sources clkset_sclk_mixer = {
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.sources = clkset_sclk_mixer_list,
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.nr_sources = ARRAY_SIZE(clkset_sclk_mixer_list),
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};
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static struct clksrc_clk clksrcs[] = {
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{
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.clk = {
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@ -490,7 +551,16 @@ static struct clksrc_clk clksrcs[] = {
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.sources = &clkset_uart,
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.reg_src = { .reg = S5P_CLK_SRC4, .shift = 16, .size = 4 },
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.reg_div = { .reg = S5P_CLK_DIV4, .shift = 16, .size = 4 },
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}
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}, {
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.clk = {
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.name = "sclk_mixer",
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.id = -1,
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.enable = s5pv210_clk_ip1_ctrl,
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.ctrlbit = (1 << 9),
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},
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.sources = &clkset_sclk_mixer,
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.reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 1 },
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},
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};
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/* Clock initialisation code */
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@ -508,6 +578,9 @@ static struct clksrc_clk *sysclks[] = {
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&clk_pclk_psys,
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&clk_vpllsrc,
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&clk_sclk_vpll,
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&clk_sclk_dac,
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&clk_sclk_pixel,
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&clk_sclk_hdmi,
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};
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void __init_or_cpufreq s5pv210_setup_clocks(void)
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