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arm/arm64: KVM: vgic: Fix SGI writes to GICD_I{CS}PENDR0
Writes to GICD_ISPENDR0 and GICD_ICPENDR0 ignore all settings of the pending state for SGIs. Make sure the implementation handles this correctly. Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
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@ -454,7 +454,7 @@ static bool handle_mmio_set_pending_reg(struct kvm_vcpu *vcpu,
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struct kvm_exit_mmio *mmio,
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phys_addr_t offset)
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{
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u32 *reg;
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u32 *reg, orig;
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u32 level_mask;
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struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
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@ -463,6 +463,7 @@ static bool handle_mmio_set_pending_reg(struct kvm_vcpu *vcpu,
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/* Mark both level and edge triggered irqs as pending */
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reg = vgic_bitmap_get_reg(&dist->irq_pending, vcpu->vcpu_id, offset);
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orig = *reg;
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vgic_reg_access(mmio, reg, offset,
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ACCESS_READ_VALUE | ACCESS_WRITE_SETBIT);
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@ -474,6 +475,12 @@ static bool handle_mmio_set_pending_reg(struct kvm_vcpu *vcpu,
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ACCESS_READ_VALUE | ACCESS_WRITE_SETBIT);
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*reg &= level_mask;
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/* Ignore writes to SGIs */
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if (offset < 2) {
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*reg &= ~0xffff;
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*reg |= orig & 0xffff;
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}
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vgic_update_state(vcpu->kvm);
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return true;
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}
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@ -486,10 +493,11 @@ static bool handle_mmio_clear_pending_reg(struct kvm_vcpu *vcpu,
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phys_addr_t offset)
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{
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u32 *level_active;
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u32 *reg;
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u32 *reg, orig;
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struct vgic_dist *dist = &vcpu->kvm->arch.vgic;
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reg = vgic_bitmap_get_reg(&dist->irq_pending, vcpu->vcpu_id, offset);
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orig = *reg;
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vgic_reg_access(mmio, reg, offset,
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ACCESS_READ_VALUE | ACCESS_WRITE_CLEARBIT);
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if (mmio->is_write) {
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@ -500,6 +508,12 @@ static bool handle_mmio_clear_pending_reg(struct kvm_vcpu *vcpu,
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vcpu->vcpu_id, offset);
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*reg |= *level_active;
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/* Ignore writes to SGIs */
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if (offset < 2) {
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*reg &= ~0xffff;
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*reg |= orig & 0xffff;
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}
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/* Clear soft-pending flags */
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reg = vgic_bitmap_get_reg(&dist->irq_soft_pend,
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vcpu->vcpu_id, offset);
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