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spi: spi-ti-qspi: switch to use modern name
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-16-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
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767e45324b
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@ -40,7 +40,7 @@ struct ti_qspi {
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/* list synchronization */
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struct mutex list_lock;
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struct spi_master *master;
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struct spi_controller *host;
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void __iomem *base;
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void __iomem *mmap_base;
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size_t mmap_size;
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@ -137,20 +137,20 @@ static inline void ti_qspi_write(struct ti_qspi *qspi,
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static int ti_qspi_setup(struct spi_device *spi)
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{
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struct ti_qspi *qspi = spi_master_get_devdata(spi->master);
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struct ti_qspi *qspi = spi_controller_get_devdata(spi->controller);
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int ret;
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if (spi->master->busy) {
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dev_dbg(qspi->dev, "master busy doing other transfers\n");
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if (spi->controller->busy) {
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dev_dbg(qspi->dev, "host busy doing other transfers\n");
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return -EBUSY;
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}
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if (!qspi->master->max_speed_hz) {
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if (!qspi->host->max_speed_hz) {
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dev_err(qspi->dev, "spi max frequency not defined\n");
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return -EINVAL;
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}
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spi->max_speed_hz = min(spi->max_speed_hz, qspi->master->max_speed_hz);
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spi->max_speed_hz = min(spi->max_speed_hz, qspi->host->max_speed_hz);
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ret = pm_runtime_resume_and_get(qspi->dev);
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if (ret < 0) {
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@ -526,7 +526,7 @@ static int ti_qspi_dma_xfer_sg(struct ti_qspi *qspi, struct sg_table rx_sg,
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static void ti_qspi_enable_memory_map(struct spi_device *spi)
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{
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struct ti_qspi *qspi = spi_master_get_devdata(spi->master);
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struct ti_qspi *qspi = spi_controller_get_devdata(spi->controller);
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ti_qspi_write(qspi, MM_SWITCH, QSPI_SPI_SWITCH_REG);
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if (qspi->ctrl_base) {
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@ -540,7 +540,7 @@ static void ti_qspi_enable_memory_map(struct spi_device *spi)
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static void ti_qspi_disable_memory_map(struct spi_device *spi)
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{
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struct ti_qspi *qspi = spi_master_get_devdata(spi->master);
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struct ti_qspi *qspi = spi_controller_get_devdata(spi->controller);
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ti_qspi_write(qspi, 0, QSPI_SPI_SWITCH_REG);
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if (qspi->ctrl_base)
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@ -554,7 +554,7 @@ static void ti_qspi_setup_mmap_read(struct spi_device *spi, u8 opcode,
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u8 data_nbits, u8 addr_width,
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u8 dummy_bytes)
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{
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struct ti_qspi *qspi = spi_master_get_devdata(spi->master);
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struct ti_qspi *qspi = spi_controller_get_devdata(spi->controller);
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u32 memval = opcode;
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switch (data_nbits) {
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@ -576,7 +576,7 @@ static void ti_qspi_setup_mmap_read(struct spi_device *spi, u8 opcode,
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static int ti_qspi_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op)
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{
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struct ti_qspi *qspi = spi_controller_get_devdata(mem->spi->master);
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struct ti_qspi *qspi = spi_controller_get_devdata(mem->spi->controller);
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size_t max_len;
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if (op->data.dir == SPI_MEM_DATA_IN) {
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@ -606,7 +606,7 @@ static int ti_qspi_adjust_op_size(struct spi_mem *mem, struct spi_mem_op *op)
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static int ti_qspi_exec_mem_op(struct spi_mem *mem,
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const struct spi_mem_op *op)
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{
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struct ti_qspi *qspi = spi_master_get_devdata(mem->spi->master);
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struct ti_qspi *qspi = spi_controller_get_devdata(mem->spi->controller);
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u32 from = 0;
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int ret = 0;
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@ -633,10 +633,10 @@ static int ti_qspi_exec_mem_op(struct spi_mem *mem,
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struct sg_table sgt;
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if (virt_addr_valid(op->data.buf.in) &&
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!spi_controller_dma_map_mem_op_data(mem->spi->master, op,
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!spi_controller_dma_map_mem_op_data(mem->spi->controller, op,
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&sgt)) {
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ret = ti_qspi_dma_xfer_sg(qspi, sgt, from);
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spi_controller_dma_unmap_mem_op_data(mem->spi->master,
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spi_controller_dma_unmap_mem_op_data(mem->spi->controller,
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op, &sgt);
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} else {
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ret = ti_qspi_dma_bounce_buffer(qspi, from,
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@ -658,10 +658,10 @@ static const struct spi_controller_mem_ops ti_qspi_mem_ops = {
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.adjust_op_size = ti_qspi_adjust_op_size,
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};
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static int ti_qspi_start_transfer_one(struct spi_master *master,
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static int ti_qspi_start_transfer_one(struct spi_controller *host,
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struct spi_message *m)
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{
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struct ti_qspi *qspi = spi_master_get_devdata(master);
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struct ti_qspi *qspi = spi_controller_get_devdata(host);
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struct spi_device *spi = m->spi;
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struct spi_transfer *t;
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int status = 0, ret;
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@ -720,7 +720,7 @@ static int ti_qspi_start_transfer_one(struct spi_master *master,
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ti_qspi_write(qspi, qspi->cmd | QSPI_INVAL, QSPI_SPI_CMD_REG);
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m->status = status;
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spi_finalize_current_message(master);
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spi_finalize_current_message(host);
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return status;
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}
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@ -756,33 +756,33 @@ MODULE_DEVICE_TABLE(of, ti_qspi_match);
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static int ti_qspi_probe(struct platform_device *pdev)
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{
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struct ti_qspi *qspi;
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struct spi_master *master;
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struct spi_controller *host;
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struct resource *r, *res_mmap;
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struct device_node *np = pdev->dev.of_node;
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u32 max_freq;
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int ret = 0, num_cs, irq;
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dma_cap_mask_t mask;
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master = spi_alloc_master(&pdev->dev, sizeof(*qspi));
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if (!master)
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host = spi_alloc_host(&pdev->dev, sizeof(*qspi));
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if (!host)
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return -ENOMEM;
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master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD;
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host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_RX_DUAL | SPI_RX_QUAD;
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master->flags = SPI_CONTROLLER_HALF_DUPLEX;
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master->setup = ti_qspi_setup;
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master->auto_runtime_pm = true;
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master->transfer_one_message = ti_qspi_start_transfer_one;
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master->dev.of_node = pdev->dev.of_node;
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master->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) |
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SPI_BPW_MASK(8);
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master->mem_ops = &ti_qspi_mem_ops;
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host->flags = SPI_CONTROLLER_HALF_DUPLEX;
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host->setup = ti_qspi_setup;
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host->auto_runtime_pm = true;
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host->transfer_one_message = ti_qspi_start_transfer_one;
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host->dev.of_node = pdev->dev.of_node;
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host->bits_per_word_mask = SPI_BPW_MASK(32) | SPI_BPW_MASK(16) |
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SPI_BPW_MASK(8);
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host->mem_ops = &ti_qspi_mem_ops;
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if (!of_property_read_u32(np, "num-cs", &num_cs))
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master->num_chipselect = num_cs;
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host->num_chipselect = num_cs;
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qspi = spi_master_get_devdata(master);
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qspi->master = master;
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qspi = spi_controller_get_devdata(host);
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qspi->host = host;
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qspi->dev = &pdev->dev;
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platform_set_drvdata(pdev, qspi);
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@ -792,7 +792,7 @@ static int ti_qspi_probe(struct platform_device *pdev)
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if (r == NULL) {
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dev_err(&pdev->dev, "missing platform data\n");
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ret = -ENODEV;
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goto free_master;
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goto free_host;
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}
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}
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@ -812,7 +812,7 @@ static int ti_qspi_probe(struct platform_device *pdev)
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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ret = irq;
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goto free_master;
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goto free_host;
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}
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mutex_init(&qspi->list_lock);
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@ -820,7 +820,7 @@ static int ti_qspi_probe(struct platform_device *pdev)
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qspi->base = devm_ioremap_resource(&pdev->dev, r);
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if (IS_ERR(qspi->base)) {
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ret = PTR_ERR(qspi->base);
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goto free_master;
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goto free_host;
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}
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@ -830,7 +830,7 @@ static int ti_qspi_probe(struct platform_device *pdev)
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"syscon-chipselects");
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if (IS_ERR(qspi->ctrl_base)) {
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ret = PTR_ERR(qspi->ctrl_base);
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goto free_master;
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goto free_host;
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}
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ret = of_property_read_u32_index(np,
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"syscon-chipselects",
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@ -838,7 +838,7 @@ static int ti_qspi_probe(struct platform_device *pdev)
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if (ret) {
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dev_err(&pdev->dev,
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"couldn't get ctrl_mod reg index\n");
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goto free_master;
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goto free_host;
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}
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}
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@ -853,7 +853,7 @@ static int ti_qspi_probe(struct platform_device *pdev)
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pm_runtime_enable(&pdev->dev);
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if (!of_property_read_u32(np, "spi-max-frequency", &max_freq))
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master->max_speed_hz = max_freq;
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host->max_speed_hz = max_freq;
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dma_cap_zero(mask);
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dma_cap_set(DMA_MEMCPY, mask);
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@ -876,7 +876,7 @@ static int ti_qspi_probe(struct platform_device *pdev)
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dma_release_channel(qspi->rx_chan);
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goto no_dma;
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}
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master->dma_rx = qspi->rx_chan;
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host->dma_rx = qspi->rx_chan;
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init_completion(&qspi->transfer_complete);
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if (res_mmap)
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qspi->mmap_phys_base = (dma_addr_t)res_mmap->start;
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@ -889,21 +889,21 @@ no_dma:
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"mmap failed with error %ld using PIO mode\n",
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PTR_ERR(qspi->mmap_base));
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qspi->mmap_base = NULL;
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master->mem_ops = NULL;
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host->mem_ops = NULL;
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}
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}
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qspi->mmap_enabled = false;
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qspi->current_cs = -1;
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ret = devm_spi_register_master(&pdev->dev, master);
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ret = devm_spi_register_controller(&pdev->dev, host);
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if (!ret)
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return 0;
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ti_qspi_dma_cleanup(qspi);
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pm_runtime_disable(&pdev->dev);
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free_master:
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spi_master_put(master);
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free_host:
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spi_controller_put(host);
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return ret;
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}
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@ -912,9 +912,9 @@ static void ti_qspi_remove(struct platform_device *pdev)
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struct ti_qspi *qspi = platform_get_drvdata(pdev);
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int rc;
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rc = spi_master_suspend(qspi->master);
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rc = spi_controller_suspend(qspi->host);
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if (rc) {
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dev_alert(&pdev->dev, "spi_master_suspend() failed (%pe)\n",
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dev_alert(&pdev->dev, "spi_controller_suspend() failed (%pe)\n",
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ERR_PTR(rc));
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return;
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}
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