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MIPS: Kconfig Add SYS_SUPPORTS_HUGETLBFS and enable it for some systems.
Add new kconfig variables SYS_SUPPORTS_HUGETLBFS and CPU_SUPPORTS_HUGEPAGES. They are enabled for systems that are known to support huge pages. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -853,6 +853,11 @@ config SYS_SUPPORTS_BIG_ENDIAN
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config SYS_SUPPORTS_LITTLE_ENDIAN
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bool
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config SYS_SUPPORTS_HUGETLBFS
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bool
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depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
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default y
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config IRQ_CPU
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bool
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@ -1057,6 +1062,7 @@ config CPU_MIPS64_R1
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select CPU_SUPPORTS_32BIT_KERNEL
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select CPU_SUPPORTS_64BIT_KERNEL
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select CPU_SUPPORTS_HIGHMEM
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select CPU_SUPPORTS_HUGEPAGES
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help
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Choose this option to build a kernel for release 1 or later of the
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MIPS64 architecture. Many modern embedded systems with a 64-bit
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@ -1076,6 +1082,7 @@ config CPU_MIPS64_R2
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select CPU_SUPPORTS_32BIT_KERNEL
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select CPU_SUPPORTS_64BIT_KERNEL
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select CPU_SUPPORTS_HIGHMEM
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select CPU_SUPPORTS_HUGEPAGES
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help
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Choose this option to build a kernel for release 2 or later of the
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MIPS64 architecture. Many modern embedded systems with a 64-bit
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@ -1162,6 +1169,7 @@ config CPU_R5500
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select CPU_HAS_LLSC
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select CPU_SUPPORTS_32BIT_KERNEL
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select CPU_SUPPORTS_64BIT_KERNEL
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select CPU_SUPPORTS_HUGEPAGES
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help
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NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
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instruction set.
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@ -1247,6 +1255,7 @@ config CPU_CAVIUM_OCTEON
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select WEAK_ORDERING
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select WEAK_REORDERING_BEYOND_LLSC
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select CPU_SUPPORTS_HIGHMEM
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select CPU_SUPPORTS_HUGEPAGES
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help
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The Cavium Octeon processor is a highly integrated chip containing
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many ethernet hardware widgets for networking tasks. The processor
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@ -1366,6 +1375,8 @@ config CPU_SUPPORTS_32BIT_KERNEL
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bool
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config CPU_SUPPORTS_64BIT_KERNEL
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bool
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config CPU_SUPPORTS_HUGEPAGES
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bool
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#
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# Set to y for ptrace access to watch registers.
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