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[MIPS] Alchemy: Fix use of __init code bug exposed by modpost warning
WARNING: vmlinux.o(.text+0x1ca608): Section mismatch: reference to .init.text: add_wired_entry (between 'config_access' and 'config_read') by refactoring the code calling add_wired_entry() from config_access() to a separate function which is called from aau1x_pci_setup(). While at it: - make some unnecassarily global variables 'static'; - fix the letter case, whitespace, etc. in the comments... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -1,8 +1,8 @@
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/*
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* BRIEF MODULE DESCRIPTION
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* Alchemy/AMD Au1x00 pci support.
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* Alchemy/AMD Au1x00 PCI support.
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*
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* Copyright 2001,2002,2003 MontaVista Software Inc.
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* Copyright 2001-2003, 2007 MontaVista Software Inc.
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* Author: MontaVista Software, Inc.
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* ppopov@mvista.com or source@mvista.com
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*
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@ -66,6 +66,8 @@ static unsigned long virt_io_addr;
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static int __init au1x_pci_setup(void)
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{
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extern void au1x_pci_cfg_init(void);
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#if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550)
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virt_io_addr = (unsigned long)ioremap(Au1500_PCI_IO_START,
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Au1500_PCI_IO_END - Au1500_PCI_IO_START + 1);
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@ -94,6 +96,8 @@ static int __init au1x_pci_setup(void)
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set_io_port_base(virt_io_addr);
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#endif
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au1x_pci_cfg_init();
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register_pci_controller(&au1x_controller);
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return 0;
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}
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@ -1,8 +1,8 @@
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/*
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* BRIEF MODULE DESCRIPTION
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* Alchemy/AMD Au1x00 pci support.
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* Alchemy/AMD Au1x00 PCI support.
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*
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* Copyright 2001,2002,2003 MontaVista Software Inc.
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* Copyright 2001-2003, 2007 MontaVista Software Inc.
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* Author: MontaVista Software, Inc.
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* ppopov@mvista.com or source@mvista.com
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*
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@ -69,10 +69,27 @@ void mod_wired_entry(int entry, unsigned long entrylo0,
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write_c0_pagemask(old_pagemask);
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}
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struct vm_struct *pci_cfg_vm;
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static struct vm_struct *pci_cfg_vm;
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static int pci_cfg_wired_entry;
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static int first_cfg = 1;
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unsigned long last_entryLo0, last_entryLo1;
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static unsigned long last_entryLo0, last_entryLo1;
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/*
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* We can't ioremap the entire pci config space because it's too large.
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* Nor can we call ioremap dynamically because some device drivers use
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* the PCI config routines from within interrupt handlers and that
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* becomes a problem in get_vm_area(). We use one wired TLB to handle
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* all config accesses for all busses.
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*/
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void __init au1x_pci_cfg_init(void)
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{
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/* Reserve a wired entry for PCI config accesses */
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pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP);
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if (!pci_cfg_vm)
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panic(KERN_ERR "PCI unable to get vm area\n");
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pci_cfg_wired_entry = read_c0_wired();
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add_wired_entry(0, 0, (unsigned long)pci_cfg_vm->addr, PM_4K);
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last_entryLo0 = last_entryLo1 = 0xffffffff;
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}
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static int config_access(unsigned char access_type, struct pci_bus *bus,
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unsigned int dev_fn, unsigned char where,
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@ -97,27 +114,6 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
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Au1500_PCI_STATCMD);
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au_sync_udelay(1);
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/*
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* We can't ioremap the entire pci config space because it's
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* too large. Nor can we call ioremap dynamically because some
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* device drivers use the pci config routines from within
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* interrupt handlers and that becomes a problem in get_vm_area().
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* We use one wired tlb to handle all config accesses for all
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* busses. To improve performance, if the current device
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* is the same as the last device accessed, we don't touch the
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* tlb.
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*/
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if (first_cfg) {
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/* reserve a wired entry for pci config accesses */
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first_cfg = 0;
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pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP);
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if (!pci_cfg_vm)
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panic(KERN_ERR "PCI unable to get vm area\n");
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pci_cfg_wired_entry = read_c0_wired();
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add_wired_entry(0, 0, (unsigned long)pci_cfg_vm->addr, PM_4K);
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last_entryLo0 = last_entryLo1 = 0xffffffff;
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}
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/* Allow board vendors to implement their own off-chip idsel.
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* If it doesn't succeed, may as well bail out at this point.
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*/
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@ -144,9 +140,12 @@ static int config_access(unsigned char access_type, struct pci_bus *bus,
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/* page boundary */
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cfg_base = cfg_base & PAGE_MASK;
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/*
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* To improve performance, if the current device is the same as
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* the last device accessed, we don't touch the TLB.
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*/
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entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7;
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entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7;
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if ((entryLo0 != last_entryLo0) || (entryLo1 != last_entryLo1)) {
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mod_wired_entry(pci_cfg_wired_entry, entryLo0, entryLo1,
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(unsigned long)pci_cfg_vm->addr, PM_4K);
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