SOC: TI Keystone driver update for v5.9

- TI K3 Ring Accelerator updates
  - Few non critical warining fixes
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Merge tag 'drivers_soc_for_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers

SOC: TI Keystone driver update for v5.9

 - TI K3 Ring Accelerator updates
 - Few non critical warining fixes

* tag 'drivers_soc_for_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  soc: TI knav_qmss: make symbol 'knav_acc_range_ops' static
  firmware: ti_sci: Replace HTTP links with HTTPS ones
  soc: ti/ti_sci_protocol.h: drop a duplicated word + clarify
  soc: ti: k3: fix semicolon.cocci warnings
  soc: ti: k3-ringacc: fix: warn: variable dereferenced before check 'ring'
  dmaengine: ti: k3-udma: Switch to k3_ringacc_request_rings_pair
  soc: ti: k3-ringacc: separate soc specific initialization
  soc: ti: k3-ringacc: add request pair of rings api.
  soc: ti: k3-ringacc: add ring's flags to dump
  soc: ti: k3-ringacc: Move state tracking variables under a struct
  dt-bindings: soc: ti: k3-ringacc: convert bindings to json-schema

Link: https://lore.kernel.org/r/1595711814-7015-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2020-07-27 14:24:50 +02:00
commit 9c52a2647a
15 changed files with 276 additions and 187 deletions

View File

@ -55,7 +55,7 @@ Required Properties:
corresponds to a range of host irqs.
For more details on TISCI IRQ resource management refer:
http://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html
https://downloads.ti.com/tisci/esd/latest/2_tisci_msgs/rm/rm_irq.html
Example:
--------

View File

@ -1,59 +0,0 @@
* Texas Instruments K3 NavigatorSS Ring Accelerator
The Ring Accelerator (RA) is a machine which converts read/write accesses
from/to a constant address into corresponding read/write accesses from/to a
circular data structure in memory. The RA eliminates the need for each DMA
controller which needs to access ring elements from having to know the current
state of the ring (base address, current offset). The DMA controller
performs a read or write access to a specific address range (which maps to the
source interface on the RA) and the RA replaces the address for the transaction
with a new address which corresponds to the head or tail element of the ring
(head for reads, tail for writes).
The Ring Accelerator is a hardware module that is responsible for accelerating
management of the packet queues. The K3 SoCs can have more than one RA instances
Required properties:
- compatible : Must be "ti,am654-navss-ringacc";
- reg : Should contain register location and length of the following
named register regions.
- reg-names : should be
"rt" - The RA Ring Real-time Control/Status Registers
"fifos" - The RA Queues Registers
"proxy_gcfg" - The RA Proxy Global Config Registers
"proxy_target" - The RA Proxy Datapath Registers
- ti,num-rings : Number of rings supported by RA
- ti,sci-rm-range-gp-rings : TI-SCI RM subtype for GP ring range
- ti,sci : phandle on TI-SCI compatible System controller node
- ti,sci-dev-id : TI-SCI device id of the ring accelerator
- msi-parent : phandle for "ti,sci-inta" interrupt controller
Optional properties:
-- ti,dma-ring-reset-quirk : enable ringacc / udma ring state interoperability
issue software w/a
Example:
ringacc: ringacc@3c000000 {
compatible = "ti,am654-navss-ringacc";
reg = <0x0 0x3c000000 0x0 0x400000>,
<0x0 0x38000000 0x0 0x400000>,
<0x0 0x31120000 0x0 0x100>,
<0x0 0x33000000 0x0 0x40000>;
reg-names = "rt", "fifos",
"proxy_gcfg", "proxy_target";
ti,num-rings = <818>;
ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
ti,dma-ring-reset-quirk;
ti,sci = <&dmsc>;
ti,sci-dev-id = <187>;
msi-parent = <&inta_main_udmass>;
};
client:
dma_ipx: dma_ipx@<addr> {
...
ti,ringacc = <&ringacc>;
...
}

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@ -0,0 +1,102 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
%YAML 1.2
---
$id: "http://devicetree.org/schemas/soc/ti/k3-ringacc.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Texas Instruments K3 NavigatorSS Ring Accelerator
maintainers:
- Santosh Shilimkar <ssantosh@kernel.org>
- Grygorii Strashko <grygorii.strashko@ti.com>
description: |
The Ring Accelerator (RA) is a machine which converts read/write accesses
from/to a constant address into corresponding read/write accesses from/to a
circular data structure in memory. The RA eliminates the need for each DMA
controller which needs to access ring elements from having to know the current
state of the ring (base address, current offset). The DMA controller
performs a read or write access to a specific address range (which maps to the
source interface on the RA) and the RA replaces the address for the transaction
with a new address which corresponds to the head or tail element of the ring
(head for reads, tail for writes).
The Ring Accelerator is a hardware module that is responsible for accelerating
management of the packet queues. The K3 SoCs can have more than one RA instances
properties:
compatible:
items:
- const: ti,am654-navss-ringacc
reg:
items:
- description: real time registers regions
- description: fifos registers regions
- description: proxy gcfg registers regions
- description: proxy target registers regions
reg-names:
items:
- const: rt
- const: fifos
- const: proxy_gcfg
- const: proxy_target
msi-parent: true
ti,num-rings:
$ref: /schemas/types.yaml#/definitions/uint32
description: Number of rings supported by RA
ti,sci-rm-range-gp-rings:
$ref: /schemas/types.yaml#/definitions/uint32
description: TI-SCI RM subtype for GP ring range
ti,sci:
$ref: /schemas/types.yaml#definitions/phandle-array
description: phandle on TI-SCI compatible System controller node
ti,sci-dev-id:
$ref: /schemas/types.yaml#/definitions/uint32
description: TI-SCI device id of the ring accelerator
ti,dma-ring-reset-quirk:
$ref: /schemas/types.yaml#definitions/flag
description: |
enable ringacc/udma ring state interoperability issue software w/a
required:
- compatible
- reg
- reg-names
- msi-parent
- ti,num-rings
- ti,sci-rm-range-gp-rings
- ti,sci
- ti,sci-dev-id
additionalProperties: false
examples:
- |
bus {
#address-cells = <2>;
#size-cells = <2>;
ringacc: ringacc@3c000000 {
compatible = "ti,am654-navss-ringacc";
reg = <0x0 0x3c000000 0x0 0x400000>,
<0x0 0x38000000 0x0 0x400000>,
<0x0 0x31120000 0x0 0x100>,
<0x0 0x33000000 0x0 0x40000>;
reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
ti,num-rings = <818>;
ti,sci-rm-range-gp-rings = <0x2>; /* GP ring range */
ti,dma-ring-reset-quirk;
ti,sci = <&dmsc>;
ti,sci-dev-id = <187>;
msi-parent = <&inta_main_udmass>;
};
};

View File

@ -271,20 +271,12 @@ struct k3_udma_glue_tx_channel *k3_udma_glue_request_tx_chn(struct device *dev,
atomic_set(&tx_chn->free_pkts, cfg->txcq_cfg.size);
/* request and cfg rings */
tx_chn->ringtx = k3_ringacc_request_ring(tx_chn->common.ringacc,
tx_chn->udma_tchan_id, 0);
if (!tx_chn->ringtx) {
ret = -ENODEV;
dev_err(dev, "Failed to get TX ring %u\n",
tx_chn->udma_tchan_id);
goto err;
}
tx_chn->ringtxcq = k3_ringacc_request_ring(tx_chn->common.ringacc,
-1, 0);
if (!tx_chn->ringtxcq) {
ret = -ENODEV;
dev_err(dev, "Failed to get TXCQ ring\n");
ret = k3_ringacc_request_rings_pair(tx_chn->common.ringacc,
tx_chn->udma_tchan_id, -1,
&tx_chn->ringtx,
&tx_chn->ringtxcq);
if (ret) {
dev_err(dev, "Failed to get TX/TXCQ rings %d\n", ret);
goto err;
}
@ -587,22 +579,16 @@ static int k3_udma_glue_cfg_rx_flow(struct k3_udma_glue_rx_channel *rx_chn,
}
/* request and cfg rings */
flow->ringrx = k3_ringacc_request_ring(rx_chn->common.ringacc,
flow_cfg->ring_rxq_id, 0);
if (!flow->ringrx) {
ret = -ENODEV;
dev_err(dev, "Failed to get RX ring\n");
ret = k3_ringacc_request_rings_pair(rx_chn->common.ringacc,
flow_cfg->ring_rxq_id,
flow_cfg->ring_rxfdq0_id,
&flow->ringrxfdq,
&flow->ringrx);
if (ret) {
dev_err(dev, "Failed to get RX/RXFDQ rings %d\n", ret);
goto err_rflow_put;
}
flow->ringrxfdq = k3_ringacc_request_ring(rx_chn->common.ringacc,
flow_cfg->ring_rxfdq0_id, 0);
if (!flow->ringrxfdq) {
ret = -ENODEV;
dev_err(dev, "Failed to get RXFDQ ring\n");
goto err_ringrx_free;
}
ret = k3_ringacc_ring_cfg(flow->ringrx, &flow_cfg->rx_cfg);
if (ret) {
dev_err(dev, "Failed to cfg ringrx %d\n", ret);
@ -673,8 +659,6 @@ static int k3_udma_glue_cfg_rx_flow(struct k3_udma_glue_rx_channel *rx_chn,
err_ringrxfdq_free:
k3_ringacc_ring_free(flow->ringrxfdq);
err_ringrx_free:
k3_ringacc_ring_free(flow->ringrx);
err_rflow_put:

View File

@ -1418,17 +1418,12 @@ static int udma_alloc_tx_resources(struct udma_chan *uc)
if (ret)
return ret;
uc->tchan->t_ring = k3_ringacc_request_ring(ud->ringacc,
uc->tchan->id, 0);
if (!uc->tchan->t_ring) {
ret = k3_ringacc_request_rings_pair(ud->ringacc, uc->tchan->id, -1,
&uc->tchan->t_ring,
&uc->tchan->tc_ring);
if (ret) {
ret = -EBUSY;
goto err_tx_ring;
}
uc->tchan->tc_ring = k3_ringacc_request_ring(ud->ringacc, -1, 0);
if (!uc->tchan->tc_ring) {
ret = -EBUSY;
goto err_txc_ring;
goto err_ring;
}
memset(&ring_cfg, 0, sizeof(ring_cfg));
@ -1447,10 +1442,9 @@ static int udma_alloc_tx_resources(struct udma_chan *uc)
err_ringcfg:
k3_ringacc_ring_free(uc->tchan->tc_ring);
uc->tchan->tc_ring = NULL;
err_txc_ring:
k3_ringacc_ring_free(uc->tchan->t_ring);
uc->tchan->t_ring = NULL;
err_tx_ring:
err_ring:
udma_put_tchan(uc);
return ret;
@ -1499,16 +1493,11 @@ static int udma_alloc_rx_resources(struct udma_chan *uc)
rflow = uc->rflow;
fd_ring_id = ud->tchan_cnt + ud->echan_cnt + uc->rchan->id;
rflow->fd_ring = k3_ringacc_request_ring(ud->ringacc, fd_ring_id, 0);
if (!rflow->fd_ring) {
ret = k3_ringacc_request_rings_pair(ud->ringacc, fd_ring_id, -1,
&rflow->fd_ring, &rflow->r_ring);
if (ret) {
ret = -EBUSY;
goto err_rx_ring;
}
rflow->r_ring = k3_ringacc_request_ring(ud->ringacc, -1, 0);
if (!rflow->r_ring) {
ret = -EBUSY;
goto err_rxc_ring;
goto err_ring;
}
memset(&ring_cfg, 0, sizeof(ring_cfg));
@ -1533,10 +1522,9 @@ static int udma_alloc_rx_resources(struct udma_chan *uc)
err_ringcfg:
k3_ringacc_ring_free(rflow->r_ring);
rflow->r_ring = NULL;
err_rxc_ring:
k3_ringacc_ring_free(rflow->fd_ring);
rflow->fd_ring = NULL;
err_rx_ring:
err_ring:
udma_put_rflow(uc);
err_rflow:
udma_put_rchan(uc);

View File

@ -2,7 +2,7 @@
/*
* Texas Instruments System Control Interface Protocol Driver
*
* Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
* Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
* Nishanth Menon
*/

View File

@ -6,7 +6,7 @@
* The system works in a message response protocol
* See: http://processors.wiki.ti.com/index.php/TISCI for details
*
* Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
* Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
*/
#ifndef __TI_SCI_H

View File

@ -2,7 +2,7 @@
/*
* Texas Instruments' K3 Interrupt Aggregator irqchip driver
*
* Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
* Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/
* Lokesh Vutla <lokeshvutla@ti.com>
*/

View File

@ -2,7 +2,7 @@
/*
* Texas Instruments' K3 Interrupt Router irqchip driver
*
* Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
* Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/
* Lokesh Vutla <lokeshvutla@ti.com>
*/

View File

@ -1,7 +1,7 @@
/*
* Texas Instrument's System Control Interface (TI-SCI) reset driver
*
* Copyright (C) 2015-2017 Texas Instruments Incorporated - http://www.ti.com/
* Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/
* Andrew F. Davis <afd@ti.com>
*
* This program is free software; you can redistribute it and/or modify

View File

@ -108,6 +108,21 @@ struct k3_ring_ops {
int (*pop_head)(struct k3_ring *ring, void *elm);
};
/**
* struct k3_ring_state - Internal state tracking structure
*
* @free: Number of free entries
* @occ: Occupancy
* @windex: Write index
* @rindex: Read index
*/
struct k3_ring_state {
u32 free;
u32 occ;
u32 windex;
u32 rindex;
};
/**
* struct k3_ring - RA Ring descriptor
*
@ -121,10 +136,6 @@ struct k3_ring_ops {
* @elm_size: Size of the ring element
* @mode: Ring mode
* @flags: flags
* @free: Number of free elements
* @occ: Ring occupancy
* @windex: Write index (only for @K3_RINGACC_RING_MODE_RING)
* @rindex: Read index (only for @K3_RINGACC_RING_MODE_RING)
* @ring_id: Ring Id
* @parent: Pointer on struct @k3_ringacc
* @use_count: Use count for shared rings
@ -143,16 +154,17 @@ struct k3_ring {
u32 flags;
#define K3_RING_FLAG_BUSY BIT(1)
#define K3_RING_FLAG_SHARED BIT(2)
u32 free;
u32 occ;
u32 windex;
u32 rindex;
struct k3_ring_state state;
u32 ring_id;
struct k3_ringacc *parent;
u32 use_count;
int proxy_id;
};
struct k3_ringacc_ops {
int (*init)(struct platform_device *pdev, struct k3_ringacc *ringacc);
};
/**
* struct k3_ringacc - Rings accelerator descriptor
*
@ -171,6 +183,7 @@ struct k3_ring {
* @tisci: pointer ti-sci handle
* @tisci_ring_ops: ti-sci rings ops
* @tisci_dev_id: ti-sci device id
* @ops: SoC specific ringacc operation
*/
struct k3_ringacc {
struct device *dev;
@ -191,6 +204,8 @@ struct k3_ringacc {
const struct ti_sci_handle *tisci;
const struct ti_sci_rm_ringacc_ops *tisci_ring_ops;
u32 tisci_dev_id;
const struct k3_ringacc_ops *ops;
};
static long k3_ringacc_ring_get_fifo_pos(struct k3_ring *ring)
@ -245,6 +260,7 @@ static void k3_ringacc_ring_dump(struct k3_ring *ring)
&ring->ring_mem_dma);
dev_dbg(dev, "dump elmsize %d, size %d, mode %d, proxy_id %d\n",
ring->elm_size, ring->size, ring->mode, ring->proxy_id);
dev_dbg(dev, "dump flags %08X\n", ring->flags);
dev_dbg(dev, "dump ring_rt_regs: db%08x\n", readl(&ring->rt->db));
dev_dbg(dev, "dump occ%08x\n", readl(&ring->rt->occ));
@ -313,6 +329,30 @@ error:
}
EXPORT_SYMBOL_GPL(k3_ringacc_request_ring);
int k3_ringacc_request_rings_pair(struct k3_ringacc *ringacc,
int fwd_id, int compl_id,
struct k3_ring **fwd_ring,
struct k3_ring **compl_ring)
{
int ret = 0;
if (!fwd_ring || !compl_ring)
return -EINVAL;
*fwd_ring = k3_ringacc_request_ring(ringacc, fwd_id, 0);
if (!(*fwd_ring))
return -ENODEV;
*compl_ring = k3_ringacc_request_ring(ringacc, compl_id, 0);
if (!(*compl_ring)) {
k3_ringacc_ring_free(*fwd_ring);
ret = -ENODEV;
}
return ret;
}
EXPORT_SYMBOL_GPL(k3_ringacc_request_rings_pair);
static void k3_ringacc_ring_reset_sci(struct k3_ring *ring)
{
struct k3_ringacc *ringacc = ring->parent;
@ -339,10 +379,7 @@ void k3_ringacc_ring_reset(struct k3_ring *ring)
if (!ring || !(ring->flags & K3_RING_FLAG_BUSY))
return;
ring->occ = 0;
ring->free = 0;
ring->rindex = 0;
ring->windex = 0;
memset(&ring->state, 0, sizeof(ring->state));
k3_ringacc_ring_reset_sci(ring);
}
@ -556,11 +593,13 @@ static int k3_ringacc_ring_cfg_sci(struct k3_ring *ring)
int k3_ringacc_ring_cfg(struct k3_ring *ring, struct k3_ring_cfg *cfg)
{
struct k3_ringacc *ringacc = ring->parent;
struct k3_ringacc *ringacc;
int ret = 0;
if (!ring || !cfg)
return -EINVAL;
ringacc = ring->parent;
if (cfg->elm_size > K3_RINGACC_RING_ELSIZE_256 ||
cfg->mode >= K3_RINGACC_RING_MODE_INVALID ||
cfg->size & ~K3_RINGACC_CFG_RING_SIZE_ELCNT_MASK ||
@ -590,10 +629,7 @@ int k3_ringacc_ring_cfg(struct k3_ring *ring, struct k3_ring_cfg *cfg)
ring->size = cfg->size;
ring->elm_size = cfg->elm_size;
ring->mode = cfg->mode;
ring->occ = 0;
ring->free = 0;
ring->rindex = 0;
ring->windex = 0;
memset(&ring->state, 0, sizeof(ring->state));
if (ring->proxy_id != K3_RINGACC_PROXY_NOT_USED)
ring->proxy = ringacc->proxy_target_base +
@ -613,7 +649,7 @@ int k3_ringacc_ring_cfg(struct k3_ring *ring, struct k3_ring_cfg *cfg)
ring->ops = NULL;
ret = -EINVAL;
goto err_free_proxy;
};
}
ring->ring_mem_virt = dma_alloc_coherent(ringacc->dev,
ring->size * (4 << ring->elm_size),
@ -664,10 +700,10 @@ u32 k3_ringacc_ring_get_free(struct k3_ring *ring)
if (!ring || !(ring->flags & K3_RING_FLAG_BUSY))
return -EINVAL;
if (!ring->free)
ring->free = ring->size - readl(&ring->rt->occ);
if (!ring->state.free)
ring->state.free = ring->size - readl(&ring->rt->occ);
return ring->free;
return ring->state.free;
}
EXPORT_SYMBOL_GPL(k3_ringacc_ring_get_free);
@ -738,7 +774,7 @@ static int k3_ringacc_ring_access_proxy(struct k3_ring *ring, void *elem,
"proxy:memcpy_fromio(x): --> ptr(%p), mode:%d\n", ptr,
access_mode);
memcpy_fromio(elem, ptr, (4 << ring->elm_size));
ring->occ--;
ring->state.occ--;
break;
case K3_RINGACC_ACCESS_MODE_PUSH_TAIL:
case K3_RINGACC_ACCESS_MODE_PUSH_HEAD:
@ -746,14 +782,14 @@ static int k3_ringacc_ring_access_proxy(struct k3_ring *ring, void *elem,
"proxy:memcpy_toio(x): --> ptr(%p), mode:%d\n", ptr,
access_mode);
memcpy_toio(ptr, elem, (4 << ring->elm_size));
ring->free--;
ring->state.free--;
break;
default:
return -EINVAL;
}
dev_dbg(ring->parent->dev, "proxy: free%d occ%d\n", ring->free,
ring->occ);
dev_dbg(ring->parent->dev, "proxy: free%d occ%d\n", ring->state.free,
ring->state.occ);
return 0;
}
@ -808,7 +844,7 @@ static int k3_ringacc_ring_access_io(struct k3_ring *ring, void *elem,
"memcpy_fromio(x): --> ptr(%p), mode:%d\n", ptr,
access_mode);
memcpy_fromio(elem, ptr, (4 << ring->elm_size));
ring->occ--;
ring->state.occ--;
break;
case K3_RINGACC_ACCESS_MODE_PUSH_TAIL:
case K3_RINGACC_ACCESS_MODE_PUSH_HEAD:
@ -816,14 +852,15 @@ static int k3_ringacc_ring_access_io(struct k3_ring *ring, void *elem,
"memcpy_toio(x): --> ptr(%p), mode:%d\n", ptr,
access_mode);
memcpy_toio(ptr, elem, (4 << ring->elm_size));
ring->free--;
ring->state.free--;
break;
default:
return -EINVAL;
}
dev_dbg(ring->parent->dev, "free%d index%d occ%d index%d\n", ring->free,
ring->windex, ring->occ, ring->rindex);
dev_dbg(ring->parent->dev, "free%d index%d occ%d index%d\n",
ring->state.free, ring->state.windex, ring->state.occ,
ring->state.rindex);
return 0;
}
@ -855,16 +892,16 @@ static int k3_ringacc_ring_push_mem(struct k3_ring *ring, void *elem)
{
void *elem_ptr;
elem_ptr = k3_ringacc_get_elm_addr(ring, ring->windex);
elem_ptr = k3_ringacc_get_elm_addr(ring, ring->state.windex);
memcpy(elem_ptr, elem, (4 << ring->elm_size));
ring->windex = (ring->windex + 1) % ring->size;
ring->free--;
ring->state.windex = (ring->state.windex + 1) % ring->size;
ring->state.free--;
writel(1, &ring->rt->db);
dev_dbg(ring->parent->dev, "ring_push_mem: free%d index%d\n",
ring->free, ring->windex);
ring->state.free, ring->state.windex);
return 0;
}
@ -873,16 +910,16 @@ static int k3_ringacc_ring_pop_mem(struct k3_ring *ring, void *elem)
{
void *elem_ptr;
elem_ptr = k3_ringacc_get_elm_addr(ring, ring->rindex);
elem_ptr = k3_ringacc_get_elm_addr(ring, ring->state.rindex);
memcpy(elem, elem_ptr, (4 << ring->elm_size));
ring->rindex = (ring->rindex + 1) % ring->size;
ring->occ--;
ring->state.rindex = (ring->state.rindex + 1) % ring->size;
ring->state.occ--;
writel(-1, &ring->rt->db);
dev_dbg(ring->parent->dev, "ring_pop_mem: occ%d index%d pos_ptr%p\n",
ring->occ, ring->rindex, elem_ptr);
ring->state.occ, ring->state.rindex, elem_ptr);
return 0;
}
@ -893,8 +930,8 @@ int k3_ringacc_ring_push(struct k3_ring *ring, void *elem)
if (!ring || !(ring->flags & K3_RING_FLAG_BUSY))
return -EINVAL;
dev_dbg(ring->parent->dev, "ring_push: free%d index%d\n", ring->free,
ring->windex);
dev_dbg(ring->parent->dev, "ring_push: free%d index%d\n",
ring->state.free, ring->state.windex);
if (k3_ringacc_ring_is_full(ring))
return -ENOMEM;
@ -914,7 +951,7 @@ int k3_ringacc_ring_push_head(struct k3_ring *ring, void *elem)
return -EINVAL;
dev_dbg(ring->parent->dev, "ring_push_head: free%d index%d\n",
ring->free, ring->windex);
ring->state.free, ring->state.windex);
if (k3_ringacc_ring_is_full(ring))
return -ENOMEM;
@ -933,13 +970,13 @@ int k3_ringacc_ring_pop(struct k3_ring *ring, void *elem)
if (!ring || !(ring->flags & K3_RING_FLAG_BUSY))
return -EINVAL;
if (!ring->occ)
ring->occ = k3_ringacc_ring_get_occ(ring);
if (!ring->state.occ)
ring->state.occ = k3_ringacc_ring_get_occ(ring);
dev_dbg(ring->parent->dev, "ring_pop: occ%d index%d\n", ring->occ,
ring->rindex);
dev_dbg(ring->parent->dev, "ring_pop: occ%d index%d\n", ring->state.occ,
ring->state.rindex);
if (!ring->occ)
if (!ring->state.occ)
return -ENODATA;
if (ring->ops && ring->ops->pop_head)
@ -956,13 +993,13 @@ int k3_ringacc_ring_pop_tail(struct k3_ring *ring, void *elem)
if (!ring || !(ring->flags & K3_RING_FLAG_BUSY))
return -EINVAL;
if (!ring->occ)
ring->occ = k3_ringacc_ring_get_occ(ring);
if (!ring->state.occ)
ring->state.occ = k3_ringacc_ring_get_occ(ring);
dev_dbg(ring->parent->dev, "ring_pop_tail: occ%d index%d\n", ring->occ,
ring->rindex);
dev_dbg(ring->parent->dev, "ring_pop_tail: occ%d index%d\n",
ring->state.occ, ring->state.rindex);
if (!ring->occ)
if (!ring->state.occ)
return -ENODATA;
if (ring->ops && ring->ops->pop_tail)
@ -1047,21 +1084,14 @@ static int k3_ringacc_probe_dt(struct k3_ringacc *ringacc)
ringacc->rm_gp_range);
}
static int k3_ringacc_probe(struct platform_device *pdev)
static int k3_ringacc_init(struct platform_device *pdev,
struct k3_ringacc *ringacc)
{
struct k3_ringacc *ringacc;
void __iomem *base_fifo, *base_rt;
struct device *dev = &pdev->dev;
struct resource *res;
int ret, i;
ringacc = devm_kzalloc(dev, sizeof(*ringacc), GFP_KERNEL);
if (!ringacc)
return -ENOMEM;
ringacc->dev = dev;
mutex_init(&ringacc->req_lock);
dev->msi_domain = of_msi_get_domain(dev, dev->of_node,
DOMAIN_BUS_TI_SCI_INTA_MSI);
if (!dev->msi_domain) {
@ -1120,14 +1150,9 @@ static int k3_ringacc_probe(struct platform_device *pdev)
ringacc->rings[i].ring_id = i;
ringacc->rings[i].proxy_id = K3_RINGACC_PROXY_NOT_USED;
}
dev_set_drvdata(dev, ringacc);
ringacc->tisci_ring_ops = &ringacc->tisci->ops.rm_ring_ops;
mutex_lock(&k3_ringacc_list_lock);
list_add_tail(&ringacc->list, &k3_ringacc_list);
mutex_unlock(&k3_ringacc_list_lock);
dev_info(dev, "Ring Accelerator probed rings:%u, gp-rings[%u,%u] sci-dev-id:%u\n",
ringacc->num_rings,
ringacc->rm_gp_range->desc[0].start,
@ -1137,15 +1162,60 @@ static int k3_ringacc_probe(struct platform_device *pdev)
ringacc->dma_ring_reset_quirk ? "enabled" : "disabled");
dev_info(dev, "RA Proxy rev. %08x, num_proxies:%u\n",
readl(&ringacc->proxy_gcfg->revision), ringacc->num_proxies);
return 0;
}
struct ringacc_match_data {
struct k3_ringacc_ops ops;
};
static struct ringacc_match_data k3_ringacc_data = {
.ops = {
.init = k3_ringacc_init,
},
};
/* Match table for of_platform binding */
static const struct of_device_id k3_ringacc_of_match[] = {
{ .compatible = "ti,am654-navss-ringacc", },
{ .compatible = "ti,am654-navss-ringacc", .data = &k3_ringacc_data, },
{},
};
static int k3_ringacc_probe(struct platform_device *pdev)
{
const struct ringacc_match_data *match_data;
const struct of_device_id *match;
struct device *dev = &pdev->dev;
struct k3_ringacc *ringacc;
int ret;
match = of_match_node(k3_ringacc_of_match, dev->of_node);
if (!match)
return -ENODEV;
match_data = match->data;
ringacc = devm_kzalloc(dev, sizeof(*ringacc), GFP_KERNEL);
if (!ringacc)
return -ENOMEM;
ringacc->dev = dev;
mutex_init(&ringacc->req_lock);
ringacc->ops = &match_data->ops;
ret = ringacc->ops->init(pdev, ringacc);
if (ret)
return ret;
dev_set_drvdata(dev, ringacc);
mutex_lock(&k3_ringacc_list_lock);
list_add_tail(&ringacc->list, &k3_ringacc_list);
mutex_unlock(&k3_ringacc_list_lock);
return 0;
}
static struct platform_driver k3_ringacc_driver = {
.probe = k3_ringacc_probe,
.driver = {

View File

@ -450,7 +450,7 @@ static int knav_acc_free_range(struct knav_range_info *range)
return 0;
}
struct knav_range_ops knav_acc_range_ops = {
static struct knav_range_ops knav_acc_range_ops = {
.set_notify = knav_acc_set_notify,
.init_queue = knav_acc_init_queue,
.open_queue = knav_acc_open_queue,

View File

@ -107,6 +107,10 @@ struct k3_ringacc *of_k3_ringacc_get_by_phandle(struct device_node *np,
struct k3_ring *k3_ringacc_request_ring(struct k3_ringacc *ringacc,
int id, u32 flags);
int k3_ringacc_request_rings_pair(struct k3_ringacc *ringacc,
int fwd_id, int compl_id,
struct k3_ring **fwd_ring,
struct k3_ring **compl_ring);
/**
* k3_ringacc_ring_reset - ring reset
* @ring: pointer on Ring

View File

@ -2,7 +2,7 @@
/*
* Texas Instruments' K3 TI SCI INTA MSI helper
*
* Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/
* Copyright (C) 2018-2019 Texas Instruments Incorporated - https://www.ti.com/
* Lokesh Vutla <lokeshvutla@ti.com>
*/

View File

@ -2,7 +2,7 @@
/*
* Texas Instruments System Control Interface Protocol
*
* Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
* Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
* Nishanth Menon
*/
@ -226,8 +226,8 @@ struct ti_sci_rm_core_ops {
* and destination
* @set_event_map: Set an Event based peripheral irq to Interrupt
* Aggregator.
* @free_irq: Free an an IRQ route between the requested source
* destination.
* @free_irq: Free an IRQ route between the requested source
* and destination.
* @free_event_map: Free an event based peripheral irq to Interrupt
* Aggregator.
*/