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Blackfin arch: fix bug - build kernel failed at head.S when reprogram clock on all platforms
Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org> Signed-off-by: Bryan Wu <cooloney@kernel.org>
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@ -88,7 +88,7 @@ ENTRY(_start_dma_code)
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r1 = r1 << 8; /* Shift it over */
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r0 = r1 | r0; /* add them all together */
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#ifdef ANOMALY_05000265
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r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
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BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
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#endif
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p0.h = hi(PLL_CTL);
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@ -79,7 +79,7 @@ ENTRY(_start_dma_code)
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r1 = r1 << 8; /* Shift it over */
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r0 = r1 | r0; /* add them all together */
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#ifdef ANOMALY_05000265
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r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
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BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
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#endif
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p0.h = hi(PLL_CTL);
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@ -88,7 +88,7 @@ ENTRY(_start_dma_code)
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r1 = r1 << 8; /* Shift it over */
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r0 = r1 | r0; /* add them all together */
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#ifdef ANOMALY_05000265
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r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
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BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
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#endif
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p0.h = hi(PLL_CTL);
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@ -95,7 +95,7 @@ ENTRY(_start_dma_code)
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r1 = r1 << 8; /* Shift it over */
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r0 = r1 | r0; /* add them all together */
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#ifdef ANOMALY_05000265
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r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
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BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
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#endif
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p0.h = hi(PLL_CTL);
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@ -78,7 +78,7 @@ ENTRY(_start_dma_code)
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r1 = r1 << 8; /* Shift it over */
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r0 = r1 | r0; /* add them all together */
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#ifdef ANOMALY_05000265
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r0 = BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
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BITSET(r0, 15); /* Add 250 mV of hysteresis to SPORT input pins */
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#endif
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p0.h = hi(PLL_CTL);
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