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clk: qcom: regmap-mux: fix parent clock lookup
The function mux_get_parent() uses qcom_find_src_index() to find the
parent clock index, which is incorrect: qcom_find_src_index() uses src
enum for the lookup, while mux_get_parent() should use cfg field (which
corresponds to the register value). Add qcom_find_cfg_index() function
doing this kind of lookup and use it for mux parent lookup.
Fixes: df96401649
("clk: qcom: add parent map for regmap mux")
Cc: stable@vger.kernel.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20211115233407.1046179-1-dmitry.baryshkov@linaro.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
parent
fa55b7dcdc
commit
9a61f813fc
@ -28,7 +28,7 @@ static u8 mux_get_parent(struct clk_hw *hw)
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val &= mask;
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if (mux->parent_map)
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return qcom_find_src_index(hw, mux->parent_map, val);
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return qcom_find_cfg_index(hw, mux->parent_map, val);
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return val;
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}
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@ -69,6 +69,18 @@ int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map, u8 src)
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}
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EXPORT_SYMBOL_GPL(qcom_find_src_index);
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int qcom_find_cfg_index(struct clk_hw *hw, const struct parent_map *map, u8 cfg)
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{
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int i, num_parents = clk_hw_get_num_parents(hw);
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for (i = 0; i < num_parents; i++)
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if (cfg == map[i].cfg)
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return i;
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return -ENOENT;
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}
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EXPORT_SYMBOL_GPL(qcom_find_cfg_index);
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struct regmap *
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qcom_cc_map(struct platform_device *pdev, const struct qcom_cc_desc *desc)
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{
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@ -49,6 +49,8 @@ extern void
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qcom_pll_set_fsm_mode(struct regmap *m, u32 reg, u8 bias_count, u8 lock_count);
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extern int qcom_find_src_index(struct clk_hw *hw, const struct parent_map *map,
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u8 src);
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extern int qcom_find_cfg_index(struct clk_hw *hw, const struct parent_map *map,
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u8 cfg);
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extern int qcom_cc_register_board_clk(struct device *dev, const char *path,
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const char *name, unsigned long rate);
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