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intelfb: add vsync interrupt support
[02/05] intelfb: Add interrupt related register definitions Add constants for accessing HWSTAM, IER, IIR, and IMR registers. Add constants for interrupt types supported by the 8xx and 9xx chipsets. The registers are also stored in the hwstate struct and dumped in the debug routine. Signed-off-by: Eric Hustvedt <ehustvedt@cecropia.com>
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@ -195,6 +195,10 @@ struct intelfb_hwstate {
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u32 mem_mode;
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u32 fw_blc_0;
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u32 fw_blc_1;
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u16 hwstam;
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u16 ier;
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u16 iir;
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u16 imr;
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};
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struct intelfb_heap_data {
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@ -587,6 +587,11 @@ intelfbhw_read_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw,
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hw->fw_blc_0 = INREG(FW_BLC_0);
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hw->fw_blc_1 = INREG(FW_BLC_1);
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hw->hwstam = INREG16(HWSTAM);
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hw->ier = INREG16(IER);
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hw->iir = INREG16(IIR);
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hw->imr = INREG16(IMR);
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return 0;
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}
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@ -796,6 +801,10 @@ intelfbhw_print_hw_state(struct intelfb_info *dinfo, struct intelfb_hwstate *hw)
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printk(" FW_BLC_0 0x%08x\n", hw->fw_blc_0);
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printk(" FW_BLC_1 0x%08x\n", hw->fw_blc_1);
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printk(" HWSTAM 0x%04x\n", hw->hwstam);
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printk(" IER 0x%04x\n", hw->ier);
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printk(" IIR 0x%04x\n", hw->iir);
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printk(" IMR 0x%04x\n", hw->imr);
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printk("hw state dump end\n");
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#endif
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}
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@ -88,6 +88,19 @@
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#define INSTDONE 0x2090
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#define PRI_RING_EMPTY 1
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#define HWSTAM 0x2098
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#define IER 0x20A0
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#define IIR 0x20A4
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#define IMR 0x20A8
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#define VSYNC_PIPE_A_INTERRUPT (1 << 7)
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#define PIPE_A_EVENT_INTERRUPT (1 << 4)
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#define VSYNC_PIPE_B_INTERRUPT (1 << 5)
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#define PIPE_B_EVENT_INTERRUPT (1 << 4)
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#define HOST_PORT_EVENT_INTERRUPT (1 << 3)
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#define CAPTURE_EVENT_INTERRUPT (1 << 2)
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#define USER_DEFINED_INTERRUPT (1 << 1)
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#define BREAKPOINT_INTERRUPT 1
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#define INSTPM 0x20c0
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#define SYNC_FLUSH_ENABLE (1 << 5)
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