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ARM: OMAP4: clock data: add clockdomains for clocks used as main clocks

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Until the OMAP4 code is converted to disable the use of the clock
framework-based clockdomain enable/disable sequence, any clock used as
a hwmod main_clk must have a clockdomain associated with it.  This
patch populates some clock structure clockdomain names to resolve the
following warnings during kernel init:

omap_hwmod: dpll_mpu_m2_ck: missing clockdomain for dpll_mpu_m2_ck.
omap_hwmod: trace_clk_div_ck: missing clockdomain for trace_clk_div_ck.
omap_hwmod: l3_div_ck: missing clockdomain for l3_div_ck.
omap_hwmod: ddrphy_ck: missing clockdomain for ddrphy_ck.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Cc: Benoît Cousson <b-cousson@ti.com>
This commit is contained in:
Paul Walmsley 2012-06-17 11:57:52 -06:00
parent 252a4c5443
commit 9a47d32d5c
1 changed files with 5 additions and 0 deletions
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5
arch/arm/mach-omap2/clock44xx_data.c
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@ -84,6 +84,7 @@ static struct clk slimbus_clk = {
static struct clk sys_32k_ck = { static struct clk sys_32k_ck = {
.name = "sys_32k_ck", .name = "sys_32k_ck",
.clkdm_name = "prm_clkdm",
.rate = 32768, .rate = 32768,
.ops = &clkops_null, .ops = &clkops_null,
}; };
@ -512,6 +513,7 @@ static struct clk ddrphy_ck = {
.name = "ddrphy_ck", .name = "ddrphy_ck",
.parent = &dpll_core_m2_ck, .parent = &dpll_core_m2_ck,
.ops = &clkops_null, .ops = &clkops_null,
.clkdm_name = "l3_emif_clkdm",
.fixed_div = 2, .fixed_div = 2,
.recalc = &omap_fixed_divisor_recalc, .recalc = &omap_fixed_divisor_recalc,
}; };
@ -769,6 +771,7 @@ static const struct clksel dpll_mpu_m2_div[] = {
static struct clk dpll_mpu_m2_ck = { static struct clk dpll_mpu_m2_ck = {
.name = "dpll_mpu_m2_ck", .name = "dpll_mpu_m2_ck",
.parent = &dpll_mpu_ck, .parent = &dpll_mpu_ck,
.clkdm_name = "cm_clkdm",
.clksel = dpll_mpu_m2_div, .clksel = dpll_mpu_m2_div,
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_MPU, .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_MPU,
.clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK, .clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK,
@ -1149,6 +1152,7 @@ static const struct clksel l3_div_div[] = {
static struct clk l3_div_ck = { static struct clk l3_div_ck = {
.name = "l3_div_ck", .name = "l3_div_ck",
.parent = &div_core_ck, .parent = &div_core_ck,
.clkdm_name = "cm_clkdm",
.clksel = l3_div_div, .clksel = l3_div_div,
.clksel_reg = OMAP4430_CM_CLKSEL_CORE, .clksel_reg = OMAP4430_CM_CLKSEL_CORE,
.clksel_mask = OMAP4430_CLKSEL_L3_MASK, .clksel_mask = OMAP4430_CLKSEL_L3_MASK,
@ -2824,6 +2828,7 @@ static const struct clksel trace_clk_div_div[] = {
static struct clk trace_clk_div_ck = { static struct clk trace_clk_div_ck = {
.name = "trace_clk_div_ck", .name = "trace_clk_div_ck",
.parent = &pmd_trace_clk_mux_ck, .parent = &pmd_trace_clk_mux_ck,
.clkdm_name = "emu_sys_clkdm",
.clksel = trace_clk_div_div, .clksel = trace_clk_div_div,
.clksel_reg = OMAP4430_CM_EMU_DEBUGSS_CLKCTRL, .clksel_reg = OMAP4430_CM_EMU_DEBUGSS_CLKCTRL,
.clksel_mask = OMAP4430_CLKSEL_PMD_TRACE_CLK_MASK, .clksel_mask = OMAP4430_CLKSEL_PMD_TRACE_CLK_MASK,