mirror of
https://github.com/torvalds/linux.git
synced 2024-09-24 00:43:11 +00:00
Merge branch 'perf/urgent' into perf/core, to pick up fixes and refresh the branch
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Ingo Molnar
commit
98d350cf7a
|
|
@ -202,8 +202,8 @@ $(MEDIA_OBJ_DIR)/%: $(MEDIA_SRC_DIR)/%.b64
|
|||
|
||||
$(MEDIA_OBJ_DIR)/v4l2.xml: $(OBJIMGFILES)
|
||||
@$($(quiet)gen_xml)
|
||||
@(ln -sf $(MEDIA_SRC_DIR)/v4l/*xml $(MEDIA_OBJ_DIR)/)
|
||||
@(ln -sf $(MEDIA_SRC_DIR)/dvb/*xml $(MEDIA_OBJ_DIR)/)
|
||||
@(ln -sf `cd $(MEDIA_SRC_DIR) && /bin/pwd`/v4l/*xml $(MEDIA_OBJ_DIR)/)
|
||||
@(ln -sf `cd $(MEDIA_SRC_DIR) && /bin/pwd`/dvb/*xml $(MEDIA_OBJ_DIR)/)
|
||||
|
||||
$(MEDIA_OBJ_DIR)/videodev2.h.xml: $(srctree)/include/uapi/linux/videodev2.h $(MEDIA_OBJ_DIR)/v4l2.xml
|
||||
@$($(quiet)gen_xml)
|
||||
|
|
|
|||
|
|
@ -20,12 +20,15 @@ Required properties:
|
|||
"allwinner,sun5i-a13-ahb-gates-clk" - for the AHB gates on A13
|
||||
"allwinner,sun5i-a10s-ahb-gates-clk" - for the AHB gates on A10s
|
||||
"allwinner,sun7i-a20-ahb-gates-clk" - for the AHB gates on A20
|
||||
"allwinner,sun6i-a31-ar100-clk" - for the AR100 on A31
|
||||
"allwinner,sun6i-a31-ahb1-mux-clk" - for the AHB1 multiplexer on A31
|
||||
"allwinner,sun6i-a31-ahb1-gates-clk" - for the AHB1 gates on A31
|
||||
"allwinner,sun4i-a10-apb0-clk" - for the APB0 clock
|
||||
"allwinner,sun6i-a31-apb0-clk" - for the APB0 clock on A31
|
||||
"allwinner,sun4i-a10-apb0-gates-clk" - for the APB0 gates on A10
|
||||
"allwinner,sun5i-a13-apb0-gates-clk" - for the APB0 gates on A13
|
||||
"allwinner,sun5i-a10s-apb0-gates-clk" - for the APB0 gates on A10s
|
||||
"allwinner,sun6i-a31-apb0-gates-clk" - for the APB0 gates on A31
|
||||
"allwinner,sun7i-a20-apb0-gates-clk" - for the APB0 gates on A20
|
||||
"allwinner,sun4i-a10-apb1-clk" - for the APB1 clock
|
||||
"allwinner,sun4i-a10-apb1-mux-clk" - for the APB1 clock muxing
|
||||
|
|
@ -41,6 +44,7 @@ Required properties:
|
|||
"allwinner,sun7i-a20-gmac-clk" - for the GMAC clock module on A20/A31
|
||||
"allwinner,sun4i-a10-usb-clk" - for usb gates + resets on A10 / A20
|
||||
"allwinner,sun5i-a13-usb-clk" - for usb gates + resets on A13
|
||||
"allwinner,sun6i-a31-usb-clk" - for usb gates + resets on A31
|
||||
|
||||
Required properties for all clocks:
|
||||
- reg : shall be the control register address for the clock.
|
||||
|
|
|
|||
|
|
@ -14,18 +14,32 @@ a subtype of a DPLL [2], although a simplified one at that.
|
|||
[2] Documentation/devicetree/bindings/clock/ti/dpll.txt
|
||||
|
||||
Required properties:
|
||||
- compatible : shall be "ti,dra7-apll-clock"
|
||||
- compatible : shall be "ti,dra7-apll-clock" or "ti,omap2-apll-clock"
|
||||
- #clock-cells : from common clock binding; shall be set to 0.
|
||||
- clocks : link phandles of parent clocks (clk-ref and clk-bypass)
|
||||
- reg : address and length of the register set for controlling the APLL.
|
||||
It contains the information of registers in the following order:
|
||||
"control" - contains the control register base address
|
||||
"idlest" - contains the idlest register base address
|
||||
"control" - contains the control register offset
|
||||
"idlest" - contains the idlest register offset
|
||||
"autoidle" - contains the autoidle register offset (OMAP2 only)
|
||||
- ti,clock-frequency : static clock frequency for the clock (OMAP2 only)
|
||||
- ti,idlest-shift : bit-shift for the idlest field (OMAP2 only)
|
||||
- ti,bit-shift : bit-shift for enable and autoidle fields (OMAP2 only)
|
||||
|
||||
Examples:
|
||||
apll_pcie_ck: apll_pcie_ck@4a008200 {
|
||||
apll_pcie_ck: apll_pcie_ck {
|
||||
#clock-cells = <0>;
|
||||
clocks = <&apll_pcie_in_clk_mux>, <&dpll_pcie_ref_ck>;
|
||||
reg = <0x4a00821c 0x4>, <0x4a008220 0x4>;
|
||||
reg = <0x021c>, <0x0220>;
|
||||
compatible = "ti,dra7-apll-clock";
|
||||
};
|
||||
|
||||
apll96_ck: apll96_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap2-apll-clock";
|
||||
clocks = <&sys_ck>;
|
||||
ti,bit-shift = <2>;
|
||||
ti,idlest-shift = <8>;
|
||||
ti,clock-frequency = <96000000>;
|
||||
reg = <0x0500>, <0x0530>, <0x0520>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -24,12 +24,14 @@ Required properties:
|
|||
"ti,omap4-dpll-core-clock",
|
||||
"ti,omap4-dpll-m4xen-clock",
|
||||
"ti,omap4-dpll-j-type-clock",
|
||||
"ti,omap5-mpu-dpll-clock",
|
||||
"ti,am3-dpll-no-gate-clock",
|
||||
"ti,am3-dpll-j-type-clock",
|
||||
"ti,am3-dpll-no-gate-j-type-clock",
|
||||
"ti,am3-dpll-clock",
|
||||
"ti,am3-dpll-core-clock",
|
||||
"ti,am3-dpll-x2-clock",
|
||||
"ti,omap2-dpll-core-clock",
|
||||
|
||||
- #clock-cells : from common clock binding; shall be set to 0.
|
||||
- clocks : link phandles of parent clocks, first entry lists reference clock
|
||||
|
|
@ -41,6 +43,7 @@ Required properties:
|
|||
"mult-div1" - contains the multiplier / divider register base address
|
||||
"autoidle" - contains the autoidle register base address (optional)
|
||||
ti,am3-* dpll types do not have autoidle register
|
||||
ti,omap2-* dpll type does not support idlest / autoidle registers
|
||||
|
||||
Optional properties:
|
||||
- DPLL mode setting - defining any one or more of the following overrides
|
||||
|
|
@ -73,3 +76,10 @@ Examples:
|
|||
clocks = <&sys_clkin_ck>, <&sys_clkin_ck>;
|
||||
reg = <0x90>, <0x5c>, <0x68>;
|
||||
};
|
||||
|
||||
dpll_ck: dpll_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap2-dpll-core-clock";
|
||||
clocks = <&sys_ck>, <&sys_ck>;
|
||||
reg = <0x0500>, <0x0540>;
|
||||
};
|
||||
|
|
|
|||
96
Documentation/devicetree/bindings/clock/ti/dra7-atl.txt
Normal file
96
Documentation/devicetree/bindings/clock/ti/dra7-atl.txt
Normal file
|
|
@ -0,0 +1,96 @@
|
|||
Device Tree Clock bindings for ATL (Audio Tracking Logic) of DRA7 SoC.
|
||||
|
||||
The ATL IP is used to generate clock to be used to synchronize baseband and
|
||||
audio codec. A single ATL IP provides four ATL clock instances sharing the same
|
||||
functional clock but can be configured to provide different clocks.
|
||||
ATL can maintain a clock averages to some desired frequency based on the bws/aws
|
||||
signals - can compensate the drift between the two ws signal.
|
||||
|
||||
In order to provide the support for ATL and it's output clocks (which can be used
|
||||
internally within the SoC or external components) two sets of bindings is needed:
|
||||
|
||||
Clock tree binding:
|
||||
This binding uses the common clock binding[1].
|
||||
To be able to integrate the ATL clocks with DT clock tree.
|
||||
Provides ccf level representation of the ATL clocks to be used by drivers.
|
||||
Since the clock instances are part of a single IP this binding is used as a node
|
||||
for the DT clock tree, the IP driver is needed to handle the actual configuration
|
||||
of the IP.
|
||||
|
||||
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
|
||||
Required properties:
|
||||
- compatible : shall be "ti,dra7-atl-clock"
|
||||
- #clock-cells : from common clock binding; shall be set to 0.
|
||||
- clocks : link phandles to functional clock of ATL
|
||||
|
||||
Binding for the IP driver:
|
||||
This binding is used to configure the IP driver which is going to handle the
|
||||
configuration of the IP for the ATL clock instances.
|
||||
|
||||
Required properties:
|
||||
- compatible : shall be "ti,dra7-atl"
|
||||
- reg : base address for the ATL IP
|
||||
- ti,provided-clocks : List of phandles to the clocks associated with the ATL
|
||||
- clocks : link phandles to functional clock of ATL
|
||||
- clock-names : Shall be set to "fck"
|
||||
- ti,hwmods : Shall be set to "atl"
|
||||
|
||||
Optional properties:
|
||||
Configuration of ATL instances:
|
||||
- atl{0/1/2/3} {
|
||||
- bws : Baseband word select signal selection
|
||||
- aws : Audio word select signal selection
|
||||
};
|
||||
|
||||
For valid word select signals, see the dt-bindings/clk/ti-dra7-atl.h include
|
||||
file.
|
||||
|
||||
Examples:
|
||||
/* clock bindings for atl provided clocks */
|
||||
atl_clkin0_ck: atl_clkin0_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,dra7-atl-clock";
|
||||
clocks = <&atl_gfclk_mux>;
|
||||
};
|
||||
|
||||
atl_clkin1_ck: atl_clkin1_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,dra7-atl-clock";
|
||||
clocks = <&atl_gfclk_mux>;
|
||||
};
|
||||
|
||||
atl_clkin2_ck: atl_clkin2_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,dra7-atl-clock";
|
||||
clocks = <&atl_gfclk_mux>;
|
||||
};
|
||||
|
||||
atl_clkin3_ck: atl_clkin3_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,dra7-atl-clock";
|
||||
clocks = <&atl_gfclk_mux>;
|
||||
};
|
||||
|
||||
/* binding for the IP */
|
||||
atl: atl@4843c000 {
|
||||
compatible = "ti,dra7-atl";
|
||||
reg = <0x4843c000 0x3ff>;
|
||||
ti,hwmods = "atl";
|
||||
ti,provided-clocks = <&atl_clkin0_ck>, <&atl_clkin1_ck>,
|
||||
<&atl_clkin2_ck>, <&atl_clkin3_ck>;
|
||||
clocks = <&atl_gfclk_mux>;
|
||||
clock-names = "fck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
#include <dt-bindings/clk/ti-dra7-atl.h>
|
||||
|
||||
&atl {
|
||||
status = "okay";
|
||||
|
||||
atl2 {
|
||||
bws = <DRA7_ATL_WS_MCASP2_FSX>;
|
||||
aws = <DRA7_ATL_WS_MCASP3_FSX>;
|
||||
};
|
||||
};
|
||||
|
|
@ -25,6 +25,11 @@ Required properties:
|
|||
to map clockdomains properly
|
||||
"ti,hsdiv-gate-clock" - gate clock with OMAP36xx specific hardware handling,
|
||||
required for a hardware errata
|
||||
"ti,composite-gate-clock" - composite gate clock, to be part of composite
|
||||
clock
|
||||
"ti,composite-no-wait-gate-clock" - composite gate clock that does not wait
|
||||
for clock to be active before returning
|
||||
from clk_enable()
|
||||
- #clock-cells : from common clock binding; shall be set to 0
|
||||
- clocks : link to phandle of parent clock
|
||||
- reg : offset for register controlling adjustable gate, not needed for
|
||||
|
|
@ -41,7 +46,7 @@ Examples:
|
|||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
clocks = <&core_96m_fck>;
|
||||
reg = <0x48004a00 0x4>;
|
||||
reg = <0x0a00>;
|
||||
ti,bit-shift = <25>;
|
||||
};
|
||||
|
||||
|
|
@ -57,7 +62,7 @@ Examples:
|
|||
#clock-cells = <0>;
|
||||
compatible = "ti,dss-gate-clock";
|
||||
clocks = <&dpll4_m4x2_ck>;
|
||||
reg = <0x48004e00 0x4>;
|
||||
reg = <0x0e00>;
|
||||
ti,bit-shift = <0>;
|
||||
};
|
||||
|
||||
|
|
@ -65,7 +70,7 @@ Examples:
|
|||
#clock-cells = <0>;
|
||||
compatible = "ti,am35xx-gate-clock";
|
||||
clocks = <&ipss_ick>;
|
||||
reg = <0x4800259c 0x4>;
|
||||
reg = <0x059c>;
|
||||
ti,bit-shift = <1>;
|
||||
};
|
||||
|
||||
|
|
@ -80,6 +85,22 @@ Examples:
|
|||
compatible = "ti,hsdiv-gate-clock";
|
||||
clocks = <&dpll4_m2x2_mul_ck>;
|
||||
ti,bit-shift = <0x1b>;
|
||||
reg = <0x48004d00 0x4>;
|
||||
reg = <0x0d00>;
|
||||
ti,set-bit-to-disable;
|
||||
};
|
||||
|
||||
vlynq_gate_fck: vlynq_gate_fck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,composite-gate-clock";
|
||||
clocks = <&core_ck>;
|
||||
ti,bit-shift = <3>;
|
||||
reg = <0x0200>;
|
||||
};
|
||||
|
||||
sys_clkout2_src_gate: sys_clkout2_src_gate {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,composite-no-wait-gate-clock";
|
||||
clocks = <&core_ck>;
|
||||
ti,bit-shift = <15>;
|
||||
reg = <0x0070>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -21,6 +21,8 @@ Required properties:
|
|||
"ti,omap3-dss-interface-clock" - interface clock with DSS specific HW handling
|
||||
"ti,omap3-ssi-interface-clock" - interface clock with SSI specific HW handling
|
||||
"ti,am35xx-interface-clock" - interface clock with AM35xx specific HW handling
|
||||
"ti,omap2430-interface-clock" - interface clock with OMAP2430 specific HW
|
||||
handling
|
||||
- #clock-cells : from common clock binding; shall be set to 0
|
||||
- clocks : link to phandle of parent clock
|
||||
- reg : base address for the control register
|
||||
|
|
|
|||
42
Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
Normal file
42
Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
Normal file
|
|
@ -0,0 +1,42 @@
|
|||
* Rockchip RK3xxx I2C controller
|
||||
|
||||
This driver interfaces with the native I2C controller present in Rockchip
|
||||
RK3xxx SoCs.
|
||||
|
||||
Required properties :
|
||||
|
||||
- reg : Offset and length of the register set for the device
|
||||
- compatible : should be "rockchip,rk3066-i2c", "rockchip,rk3188-i2c" or
|
||||
"rockchip,rk3288-i2c".
|
||||
- interrupts : interrupt number
|
||||
- clocks : parent clock
|
||||
|
||||
Required on RK3066, RK3188 :
|
||||
|
||||
- rockchip,grf : the phandle of the syscon node for the general register
|
||||
file (GRF)
|
||||
- on those SoCs an alias with the correct I2C bus ID (bit offset in the GRF)
|
||||
is also required.
|
||||
|
||||
Optional properties :
|
||||
|
||||
- clock-frequency : SCL frequency to use (in Hz). If omitted, 100kHz is used.
|
||||
|
||||
Example:
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c0;
|
||||
}
|
||||
|
||||
i2c0: i2c@2002d000 {
|
||||
compatible = "rockchip,rk3188-i2c";
|
||||
reg = <0x2002d000 0x1000>;
|
||||
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
rockchip,grf = <&grf>;
|
||||
|
||||
clock-names = "i2c";
|
||||
clocks = <&cru PCLK_I2C0>;
|
||||
};
|
||||
41
Documentation/devicetree/bindings/i2c/i2c-sunxi-p2wi.txt
Normal file
41
Documentation/devicetree/bindings/i2c/i2c-sunxi-p2wi.txt
Normal file
|
|
@ -0,0 +1,41 @@
|
|||
|
||||
* Allwinner P2WI (Push/Pull 2 Wire Interface) controller
|
||||
|
||||
Required properties :
|
||||
|
||||
- reg : Offset and length of the register set for the device.
|
||||
- compatible : Should one of the following:
|
||||
- "allwinner,sun6i-a31-p2wi"
|
||||
- interrupts : The interrupt line connected to the P2WI peripheral.
|
||||
- clocks : The gate clk connected to the P2WI peripheral.
|
||||
- resets : The reset line connected to the P2WI peripheral.
|
||||
|
||||
Optional properties :
|
||||
|
||||
- clock-frequency : Desired P2WI bus clock frequency in Hz. If not set the
|
||||
default frequency is 100kHz
|
||||
|
||||
A P2WI may contain one child node encoding a P2WI slave device.
|
||||
|
||||
Slave device properties:
|
||||
Required properties:
|
||||
- reg : the I2C slave address used during the initialization
|
||||
process to switch from I2C to P2WI mode
|
||||
|
||||
Example:
|
||||
|
||||
p2wi@01f03400 {
|
||||
compatible = "allwinner,sun6i-a31-p2wi";
|
||||
reg = <0x01f03400 0x400>;
|
||||
interrupts = <0 39 4>;
|
||||
clocks = <&apb0_gates 3>;
|
||||
clock-frequency = <6000000>;
|
||||
resets = <&apb0_rst 3>;
|
||||
|
||||
axp221: pmic@68 {
|
||||
compatible = "x-powers,axp221";
|
||||
reg = <0x68>;
|
||||
|
||||
/* ... */
|
||||
};
|
||||
};
|
||||
43
Documentation/hwmon/shtc1
Normal file
43
Documentation/hwmon/shtc1
Normal file
|
|
@ -0,0 +1,43 @@
|
|||
Kernel driver shtc1
|
||||
===================
|
||||
|
||||
Supported chips:
|
||||
* Sensirion SHTC1
|
||||
Prefix: 'shtc1'
|
||||
Addresses scanned: none
|
||||
Datasheet: http://www.sensirion.com/file/datasheet_shtc1
|
||||
|
||||
* Sensirion SHTW1
|
||||
Prefix: 'shtw1'
|
||||
Addresses scanned: none
|
||||
Datasheet: Not publicly available
|
||||
|
||||
Author:
|
||||
Johannes Winkelmann <johannes.winkelmann@sensirion.com>
|
||||
|
||||
Description
|
||||
-----------
|
||||
|
||||
This driver implements support for the Sensirion SHTC1 chip, a humidity and
|
||||
temperature sensor. Temperature is measured in degrees celsius, relative
|
||||
humidity is expressed as a percentage. Driver can be used as well for SHTW1
|
||||
chip, which has the same electrical interface.
|
||||
|
||||
The device communicates with the I2C protocol. All sensors are set to I2C
|
||||
address 0x70. See Documentation/i2c/instantiating-devices for methods to
|
||||
instantiate the device.
|
||||
|
||||
There are two options configurable by means of shtc1_platform_data:
|
||||
1. blocking (pull the I2C clock line down while performing the measurement) or
|
||||
non-blocking mode. Blocking mode will guarantee the fastest result but
|
||||
the I2C bus will be busy during that time. By default, non-blocking mode
|
||||
is used. Make sure clock-stretching works properly on your device if you
|
||||
want to use blocking mode.
|
||||
2. high or low accuracy. High accuracy is used by default and using it is
|
||||
strongly recommended.
|
||||
|
||||
sysfs-Interface
|
||||
---------------
|
||||
|
||||
temp1_input - temperature input
|
||||
humidity1_input - humidity input
|
||||
|
|
@ -1171,7 +1171,7 @@ When kbuild executes, the following steps are followed (roughly):
|
|||
obvious reason.
|
||||
|
||||
dtc
|
||||
Create flattend device tree blob object suitable for linking
|
||||
Create flattened device tree blob object suitable for linking
|
||||
into vmlinux. Device tree blobs linked into vmlinux are placed
|
||||
in an init section in the image. Platform code *must* copy the
|
||||
blob to non-init memory prior to calling unflatten_device_tree().
|
||||
|
|
|
|||
|
|
@ -1474,6 +1474,13 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
js= [HW,JOY] Analog joystick
|
||||
See Documentation/input/joystick.txt.
|
||||
|
||||
kaslr/nokaslr [X86]
|
||||
Enable/disable kernel and module base offset ASLR
|
||||
(Address Space Layout Randomization) if built into
|
||||
the kernel. When CONFIG_HIBERNATION is selected,
|
||||
kASLR is disabled by default. When kASLR is enabled,
|
||||
hibernation will be disabled.
|
||||
|
||||
keepinitrd [HW,ARM]
|
||||
|
||||
kernelcore=nn[KMG] [KNL,X86,IA-64,PPC] This parameter
|
||||
|
|
@ -2110,10 +2117,6 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
noapic [SMP,APIC] Tells the kernel to not make use of any
|
||||
IOAPICs that may be present in the system.
|
||||
|
||||
nokaslr [X86]
|
||||
Disable kernel and module base offset ASLR (Address
|
||||
Space Layout Randomization) if built into the kernel.
|
||||
|
||||
noautogroup Disable scheduler automatic task group creation.
|
||||
|
||||
nobats [PPC] Do not use BATs for mapping kernel lowmem
|
||||
|
|
@ -2184,6 +2187,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
in certain environments such as networked servers or
|
||||
real-time systems.
|
||||
|
||||
nohibernate [HIBERNATION] Disable hibernation and resume.
|
||||
|
||||
nohz= [KNL] Boottime enable/disable dynamic ticks
|
||||
Valid arguments: on, off
|
||||
Default: on
|
||||
|
|
@ -2980,6 +2985,7 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
noresume Don't check if there's a hibernation image
|
||||
present during boot.
|
||||
nocompress Don't compress/decompress hibernation images.
|
||||
no Disable hibernation and resume.
|
||||
|
||||
retain_initrd [RAM] Keep initrd memory after extraction
|
||||
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@ Kernel driver nouveau
|
|||
Supported chips:
|
||||
* NV43+
|
||||
|
||||
Authors: Martin Peres (mupuf) <martin.peres@labri.fr>
|
||||
Authors: Martin Peres (mupuf) <martin.peres@free.fr>
|
||||
|
||||
Description
|
||||
---------
|
||||
|
|
@ -68,8 +68,9 @@ Your fan can be driven in different modes:
|
|||
|
||||
NOTE: Be sure to use the manual mode if you want to drive the fan speed manually
|
||||
|
||||
NOTE2: Not all fan management modes may be supported on all chipsets. We are
|
||||
working on it.
|
||||
NOTE2: When operating in manual mode outside the vbios-defined
|
||||
[PWM_min, PWM_max] range, the reported fan speed (RPM) may not be accurate
|
||||
depending on your hardware.
|
||||
|
||||
Bug reports
|
||||
---------
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
/*
|
||||
* parse_vdso.c: Linux reference vDSO parser
|
||||
* Written by Andrew Lutomirski, 2011.
|
||||
* Written by Andrew Lutomirski, 2011-2014.
|
||||
*
|
||||
* This code is meant to be linked in to various programs that run on Linux.
|
||||
* As such, it is available with as few restrictions as possible. This file
|
||||
|
|
@ -11,13 +11,14 @@
|
|||
* it starts a program. It works equally well in statically and dynamically
|
||||
* linked binaries.
|
||||
*
|
||||
* This code is tested on x86_64. In principle it should work on any 64-bit
|
||||
* This code is tested on x86. In principle it should work on any
|
||||
* architecture that has a vDSO.
|
||||
*/
|
||||
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
#include <limits.h>
|
||||
#include <elf.h>
|
||||
|
||||
/*
|
||||
|
|
@ -45,11 +46,18 @@ extern void *vdso_sym(const char *version, const char *name);
|
|||
|
||||
|
||||
/* And here's the code. */
|
||||
|
||||
#ifndef __x86_64__
|
||||
# error Not yet ported to non-x86_64 architectures
|
||||
#ifndef ELF_BITS
|
||||
# if ULONG_MAX > 0xffffffffUL
|
||||
# define ELF_BITS 64
|
||||
# else
|
||||
# define ELF_BITS 32
|
||||
# endif
|
||||
#endif
|
||||
|
||||
#define ELF_BITS_XFORM2(bits, x) Elf##bits##_##x
|
||||
#define ELF_BITS_XFORM(bits, x) ELF_BITS_XFORM2(bits, x)
|
||||
#define ELF(x) ELF_BITS_XFORM(ELF_BITS, x)
|
||||
|
||||
static struct vdso_info
|
||||
{
|
||||
bool valid;
|
||||
|
|
@ -59,14 +67,14 @@ static struct vdso_info
|
|||
uintptr_t load_offset; /* load_addr - recorded vaddr */
|
||||
|
||||
/* Symbol table */
|
||||
Elf64_Sym *symtab;
|
||||
ELF(Sym) *symtab;
|
||||
const char *symstrings;
|
||||
Elf64_Word *bucket, *chain;
|
||||
Elf64_Word nbucket, nchain;
|
||||
ELF(Word) *bucket, *chain;
|
||||
ELF(Word) nbucket, nchain;
|
||||
|
||||
/* Version table */
|
||||
Elf64_Versym *versym;
|
||||
Elf64_Verdef *verdef;
|
||||
ELF(Versym) *versym;
|
||||
ELF(Verdef) *verdef;
|
||||
} vdso_info;
|
||||
|
||||
/* Straight from the ELF specification. */
|
||||
|
|
@ -92,9 +100,14 @@ void vdso_init_from_sysinfo_ehdr(uintptr_t base)
|
|||
|
||||
vdso_info.load_addr = base;
|
||||
|
||||
Elf64_Ehdr *hdr = (Elf64_Ehdr*)base;
|
||||
Elf64_Phdr *pt = (Elf64_Phdr*)(vdso_info.load_addr + hdr->e_phoff);
|
||||
Elf64_Dyn *dyn = 0;
|
||||
ELF(Ehdr) *hdr = (ELF(Ehdr)*)base;
|
||||
if (hdr->e_ident[EI_CLASS] !=
|
||||
(ELF_BITS == 32 ? ELFCLASS32 : ELFCLASS64)) {
|
||||
return; /* Wrong ELF class -- check ELF_BITS */
|
||||
}
|
||||
|
||||
ELF(Phdr) *pt = (ELF(Phdr)*)(vdso_info.load_addr + hdr->e_phoff);
|
||||
ELF(Dyn) *dyn = 0;
|
||||
|
||||
/*
|
||||
* We need two things from the segment table: the load offset
|
||||
|
|
@ -108,7 +121,7 @@ void vdso_init_from_sysinfo_ehdr(uintptr_t base)
|
|||
+ (uintptr_t)pt[i].p_offset
|
||||
- (uintptr_t)pt[i].p_vaddr;
|
||||
} else if (pt[i].p_type == PT_DYNAMIC) {
|
||||
dyn = (Elf64_Dyn*)(base + pt[i].p_offset);
|
||||
dyn = (ELF(Dyn)*)(base + pt[i].p_offset);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -118,7 +131,7 @@ void vdso_init_from_sysinfo_ehdr(uintptr_t base)
|
|||
/*
|
||||
* Fish out the useful bits of the dynamic table.
|
||||
*/
|
||||
Elf64_Word *hash = 0;
|
||||
ELF(Word) *hash = 0;
|
||||
vdso_info.symstrings = 0;
|
||||
vdso_info.symtab = 0;
|
||||
vdso_info.versym = 0;
|
||||
|
|
@ -131,22 +144,22 @@ void vdso_init_from_sysinfo_ehdr(uintptr_t base)
|
|||
+ vdso_info.load_offset);
|
||||
break;
|
||||
case DT_SYMTAB:
|
||||
vdso_info.symtab = (Elf64_Sym *)
|
||||
vdso_info.symtab = (ELF(Sym) *)
|
||||
((uintptr_t)dyn[i].d_un.d_ptr
|
||||
+ vdso_info.load_offset);
|
||||
break;
|
||||
case DT_HASH:
|
||||
hash = (Elf64_Word *)
|
||||
hash = (ELF(Word) *)
|
||||
((uintptr_t)dyn[i].d_un.d_ptr
|
||||
+ vdso_info.load_offset);
|
||||
break;
|
||||
case DT_VERSYM:
|
||||
vdso_info.versym = (Elf64_Versym *)
|
||||
vdso_info.versym = (ELF(Versym) *)
|
||||
((uintptr_t)dyn[i].d_un.d_ptr
|
||||
+ vdso_info.load_offset);
|
||||
break;
|
||||
case DT_VERDEF:
|
||||
vdso_info.verdef = (Elf64_Verdef *)
|
||||
vdso_info.verdef = (ELF(Verdef) *)
|
||||
((uintptr_t)dyn[i].d_un.d_ptr
|
||||
+ vdso_info.load_offset);
|
||||
break;
|
||||
|
|
@ -168,8 +181,8 @@ void vdso_init_from_sysinfo_ehdr(uintptr_t base)
|
|||
vdso_info.valid = true;
|
||||
}
|
||||
|
||||
static bool vdso_match_version(Elf64_Versym ver,
|
||||
const char *name, Elf64_Word hash)
|
||||
static bool vdso_match_version(ELF(Versym) ver,
|
||||
const char *name, ELF(Word) hash)
|
||||
{
|
||||
/*
|
||||
* This is a helper function to check if the version indexed by
|
||||
|
|
@ -188,7 +201,7 @@ static bool vdso_match_version(Elf64_Versym ver,
|
|||
|
||||
/* First step: find the version definition */
|
||||
ver &= 0x7fff; /* Apparently bit 15 means "hidden" */
|
||||
Elf64_Verdef *def = vdso_info.verdef;
|
||||
ELF(Verdef) *def = vdso_info.verdef;
|
||||
while(true) {
|
||||
if ((def->vd_flags & VER_FLG_BASE) == 0
|
||||
&& (def->vd_ndx & 0x7fff) == ver)
|
||||
|
|
@ -197,11 +210,11 @@ static bool vdso_match_version(Elf64_Versym ver,
|
|||
if (def->vd_next == 0)
|
||||
return false; /* No definition. */
|
||||
|
||||
def = (Elf64_Verdef *)((char *)def + def->vd_next);
|
||||
def = (ELF(Verdef) *)((char *)def + def->vd_next);
|
||||
}
|
||||
|
||||
/* Now figure out whether it matches. */
|
||||
Elf64_Verdaux *aux = (Elf64_Verdaux*)((char *)def + def->vd_aux);
|
||||
ELF(Verdaux) *aux = (ELF(Verdaux)*)((char *)def + def->vd_aux);
|
||||
return def->vd_hash == hash
|
||||
&& !strcmp(name, vdso_info.symstrings + aux->vda_name);
|
||||
}
|
||||
|
|
@ -213,10 +226,10 @@ void *vdso_sym(const char *version, const char *name)
|
|||
return 0;
|
||||
|
||||
ver_hash = elf_hash(version);
|
||||
Elf64_Word chain = vdso_info.bucket[elf_hash(name) % vdso_info.nbucket];
|
||||
ELF(Word) chain = vdso_info.bucket[elf_hash(name) % vdso_info.nbucket];
|
||||
|
||||
for (; chain != STN_UNDEF; chain = vdso_info.chain[chain]) {
|
||||
Elf64_Sym *sym = &vdso_info.symtab[chain];
|
||||
ELF(Sym) *sym = &vdso_info.symtab[chain];
|
||||
|
||||
/* Check for a defined global or weak function w/ right name. */
|
||||
if (ELF64_ST_TYPE(sym->st_info) != STT_FUNC)
|
||||
|
|
@ -243,7 +256,7 @@ void *vdso_sym(const char *version, const char *name)
|
|||
|
||||
void vdso_init_from_auxv(void *auxv)
|
||||
{
|
||||
Elf64_auxv_t *elf_auxv = auxv;
|
||||
ELF(auxv_t) *elf_auxv = auxv;
|
||||
for (int i = 0; elf_auxv[i].a_type != AT_NULL; i++)
|
||||
{
|
||||
if (elf_auxv[i].a_type == AT_SYSINFO_EHDR) {
|
||||
|
|
|
|||
128
Documentation/vDSO/vdso_standalone_test_x86.c
Normal file
128
Documentation/vDSO/vdso_standalone_test_x86.c
Normal file
|
|
@ -0,0 +1,128 @@
|
|||
/*
|
||||
* vdso_test.c: Sample code to test parse_vdso.c on x86
|
||||
* Copyright (c) 2011-2014 Andy Lutomirski
|
||||
* Subject to the GNU General Public License, version 2
|
||||
*
|
||||
* You can amuse yourself by compiling with:
|
||||
* gcc -std=gnu99 -nostdlib
|
||||
* -Os -fno-asynchronous-unwind-tables -flto -lgcc_s
|
||||
* vdso_standalone_test_x86.c parse_vdso.c
|
||||
* to generate a small binary. On x86_64, you can omit -lgcc_s
|
||||
* if you want the binary to be completely standalone.
|
||||
*/
|
||||
|
||||
#include <sys/syscall.h>
|
||||
#include <sys/time.h>
|
||||
#include <unistd.h>
|
||||
#include <stdint.h>
|
||||
|
||||
extern void *vdso_sym(const char *version, const char *name);
|
||||
extern void vdso_init_from_sysinfo_ehdr(uintptr_t base);
|
||||
extern void vdso_init_from_auxv(void *auxv);
|
||||
|
||||
/* We need a libc functions... */
|
||||
int strcmp(const char *a, const char *b)
|
||||
{
|
||||
/* This implementation is buggy: it never returns -1. */
|
||||
while (*a || *b) {
|
||||
if (*a != *b)
|
||||
return 1;
|
||||
if (*a == 0 || *b == 0)
|
||||
return 1;
|
||||
a++;
|
||||
b++;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* ...and two syscalls. This is x86-specific. */
|
||||
static inline long x86_syscall3(long nr, long a0, long a1, long a2)
|
||||
{
|
||||
long ret;
|
||||
#ifdef __x86_64__
|
||||
asm volatile ("syscall" : "=a" (ret) : "a" (nr),
|
||||
"D" (a0), "S" (a1), "d" (a2) :
|
||||
"cc", "memory", "rcx",
|
||||
"r8", "r9", "r10", "r11" );
|
||||
#else
|
||||
asm volatile ("int $0x80" : "=a" (ret) : "a" (nr),
|
||||
"b" (a0), "c" (a1), "d" (a2) :
|
||||
"cc", "memory" );
|
||||
#endif
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline long linux_write(int fd, const void *data, size_t len)
|
||||
{
|
||||
return x86_syscall3(__NR_write, fd, (long)data, (long)len);
|
||||
}
|
||||
|
||||
static inline void linux_exit(int code)
|
||||
{
|
||||
x86_syscall3(__NR_exit, code, 0, 0);
|
||||
}
|
||||
|
||||
void to_base10(char *lastdig, uint64_t n)
|
||||
{
|
||||
while (n) {
|
||||
*lastdig = (n % 10) + '0';
|
||||
n /= 10;
|
||||
lastdig--;
|
||||
}
|
||||
}
|
||||
|
||||
__attribute__((externally_visible)) void c_main(void **stack)
|
||||
{
|
||||
/* Parse the stack */
|
||||
long argc = (long)*stack;
|
||||
stack += argc + 2;
|
||||
|
||||
/* Now we're pointing at the environment. Skip it. */
|
||||
while(*stack)
|
||||
stack++;
|
||||
stack++;
|
||||
|
||||
/* Now we're pointing at auxv. Initialize the vDSO parser. */
|
||||
vdso_init_from_auxv((void *)stack);
|
||||
|
||||
/* Find gettimeofday. */
|
||||
typedef long (*gtod_t)(struct timeval *tv, struct timezone *tz);
|
||||
gtod_t gtod = (gtod_t)vdso_sym("LINUX_2.6", "__vdso_gettimeofday");
|
||||
|
||||
if (!gtod)
|
||||
linux_exit(1);
|
||||
|
||||
struct timeval tv;
|
||||
long ret = gtod(&tv, 0);
|
||||
|
||||
if (ret == 0) {
|
||||
char buf[] = "The time is .000000\n";
|
||||
to_base10(buf + 31, tv.tv_sec);
|
||||
to_base10(buf + 38, tv.tv_usec);
|
||||
linux_write(1, buf, sizeof(buf) - 1);
|
||||
} else {
|
||||
linux_exit(ret);
|
||||
}
|
||||
|
||||
linux_exit(0);
|
||||
}
|
||||
|
||||
/*
|
||||
* This is the real entry point. It passes the initial stack into
|
||||
* the C entry point.
|
||||
*/
|
||||
asm (
|
||||
".text\n"
|
||||
".global _start\n"
|
||||
".type _start,@function\n"
|
||||
"_start:\n\t"
|
||||
#ifdef __x86_64__
|
||||
"mov %rsp,%rdi\n\t"
|
||||
"jmp c_main"
|
||||
#else
|
||||
"push %esp\n\t"
|
||||
"call c_main\n\t"
|
||||
"int $3"
|
||||
#endif
|
||||
);
|
||||
|
|
@ -1,111 +1,52 @@
|
|||
/*
|
||||
* vdso_test.c: Sample code to test parse_vdso.c on x86_64
|
||||
* Copyright (c) 2011 Andy Lutomirski
|
||||
* vdso_test.c: Sample code to test parse_vdso.c
|
||||
* Copyright (c) 2014 Andy Lutomirski
|
||||
* Subject to the GNU General Public License, version 2
|
||||
*
|
||||
* You can amuse yourself by compiling with:
|
||||
* gcc -std=gnu99 -nostdlib
|
||||
* -Os -fno-asynchronous-unwind-tables -flto
|
||||
* vdso_test.c parse_vdso.c -o vdso_test
|
||||
* to generate a small binary with no dependencies at all.
|
||||
* Compile with:
|
||||
* gcc -std=gnu99 vdso_test.c parse_vdso.c
|
||||
*
|
||||
* Tested on x86, 32-bit and 64-bit. It may work on other architectures, too.
|
||||
*/
|
||||
|
||||
#include <sys/syscall.h>
|
||||
#include <sys/time.h>
|
||||
#include <unistd.h>
|
||||
#include <stdint.h>
|
||||
#include <elf.h>
|
||||
#include <stdio.h>
|
||||
#include <sys/auxv.h>
|
||||
#include <sys/time.h>
|
||||
|
||||
extern void *vdso_sym(const char *version, const char *name);
|
||||
extern void vdso_init_from_sysinfo_ehdr(uintptr_t base);
|
||||
extern void vdso_init_from_auxv(void *auxv);
|
||||
|
||||
/* We need a libc functions... */
|
||||
int strcmp(const char *a, const char *b)
|
||||
int main(int argc, char **argv)
|
||||
{
|
||||
/* This implementation is buggy: it never returns -1. */
|
||||
while (*a || *b) {
|
||||
if (*a != *b)
|
||||
return 1;
|
||||
if (*a == 0 || *b == 0)
|
||||
return 1;
|
||||
a++;
|
||||
b++;
|
||||
unsigned long sysinfo_ehdr = getauxval(AT_SYSINFO_EHDR);
|
||||
if (!sysinfo_ehdr) {
|
||||
printf("AT_SYSINFO_EHDR is not present!\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* ...and two syscalls. This is x86_64-specific. */
|
||||
static inline long linux_write(int fd, const void *data, size_t len)
|
||||
{
|
||||
|
||||
long ret;
|
||||
asm volatile ("syscall" : "=a" (ret) : "a" (__NR_write),
|
||||
"D" (fd), "S" (data), "d" (len) :
|
||||
"cc", "memory", "rcx",
|
||||
"r8", "r9", "r10", "r11" );
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline void linux_exit(int code)
|
||||
{
|
||||
asm volatile ("syscall" : : "a" (__NR_exit), "D" (code));
|
||||
}
|
||||
|
||||
void to_base10(char *lastdig, uint64_t n)
|
||||
{
|
||||
while (n) {
|
||||
*lastdig = (n % 10) + '0';
|
||||
n /= 10;
|
||||
lastdig--;
|
||||
}
|
||||
}
|
||||
|
||||
__attribute__((externally_visible)) void c_main(void **stack)
|
||||
{
|
||||
/* Parse the stack */
|
||||
long argc = (long)*stack;
|
||||
stack += argc + 2;
|
||||
|
||||
/* Now we're pointing at the environment. Skip it. */
|
||||
while(*stack)
|
||||
stack++;
|
||||
stack++;
|
||||
|
||||
/* Now we're pointing at auxv. Initialize the vDSO parser. */
|
||||
vdso_init_from_auxv((void *)stack);
|
||||
vdso_init_from_sysinfo_ehdr(getauxval(AT_SYSINFO_EHDR));
|
||||
|
||||
/* Find gettimeofday. */
|
||||
typedef long (*gtod_t)(struct timeval *tv, struct timezone *tz);
|
||||
gtod_t gtod = (gtod_t)vdso_sym("LINUX_2.6", "__vdso_gettimeofday");
|
||||
|
||||
if (!gtod)
|
||||
linux_exit(1);
|
||||
if (!gtod) {
|
||||
printf("Could not find __vdso_gettimeofday\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
struct timeval tv;
|
||||
long ret = gtod(&tv, 0);
|
||||
|
||||
if (ret == 0) {
|
||||
char buf[] = "The time is .000000\n";
|
||||
to_base10(buf + 31, tv.tv_sec);
|
||||
to_base10(buf + 38, tv.tv_usec);
|
||||
linux_write(1, buf, sizeof(buf) - 1);
|
||||
printf("The time is %lld.%06lld\n",
|
||||
(long long)tv.tv_sec, (long long)tv.tv_usec);
|
||||
} else {
|
||||
linux_exit(ret);
|
||||
printf("__vdso_gettimeofday failed\n");
|
||||
}
|
||||
|
||||
linux_exit(0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* This is the real entry point. It passes the initial stack into
|
||||
* the C entry point.
|
||||
*/
|
||||
asm (
|
||||
".text\n"
|
||||
".global _start\n"
|
||||
".type _start,@function\n"
|
||||
"_start:\n\t"
|
||||
"mov %rsp,%rdi\n\t"
|
||||
"jmp c_main"
|
||||
);
|
||||
|
|
|
|||
15
MAINTAINERS
15
MAINTAINERS
|
|
@ -2594,7 +2594,7 @@ S: Supported
|
|||
F: drivers/infiniband/hw/cxgb3/
|
||||
|
||||
CXGB4 ETHERNET DRIVER (CXGB4)
|
||||
M: Dimitris Michailidis <dm@chelsio.com>
|
||||
M: Hariprasad S <hariprasad@chelsio.com>
|
||||
L: netdev@vger.kernel.org
|
||||
W: http://www.chelsio.com
|
||||
S: Supported
|
||||
|
|
@ -6960,7 +6960,7 @@ PKUNITY SOC DRIVERS
|
|||
M: Guan Xuetao <gxt@mprc.pku.edu.cn>
|
||||
W: http://mprc.pku.edu.cn/~guanxuetao/linux
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/epip/linux-2.6-unicore32.git
|
||||
T: git git://github.com/gxt/linux.git
|
||||
F: drivers/input/serio/i8042-unicore32io.h
|
||||
F: drivers/i2c/busses/i2c-puv3.c
|
||||
F: drivers/video/fb-puv3.c
|
||||
|
|
@ -7948,6 +7948,7 @@ F: drivers/mmc/host/sdhci-spear.c
|
|||
|
||||
SECURITY SUBSYSTEM
|
||||
M: James Morris <james.l.morris@oracle.com>
|
||||
M: Serge E. Hallyn <serge@hallyn.com>
|
||||
L: linux-security-module@vger.kernel.org (suggested Cc:)
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jmorris/linux-security.git
|
||||
W: http://kernsec.org/
|
||||
|
|
@ -9276,7 +9277,7 @@ UNICORE32 ARCHITECTURE:
|
|||
M: Guan Xuetao <gxt@mprc.pku.edu.cn>
|
||||
W: http://mprc.pku.edu.cn/~guanxuetao/linux
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/epip/linux-2.6-unicore32.git
|
||||
T: git git://github.com/gxt/linux.git
|
||||
F: arch/unicore32/
|
||||
|
||||
UNIFDEF
|
||||
|
|
@ -9743,6 +9744,14 @@ L: virtualization@lists.linux-foundation.org
|
|||
S: Supported
|
||||
F: arch/x86/kernel/cpu/vmware.c
|
||||
|
||||
VMWARE BALLOON DRIVER
|
||||
M: Xavier Deguillard <xdeguillard@vmware.com>
|
||||
M: Philip Moltmann <moltmann@vmware.com>
|
||||
M: "VMware, Inc." <pv-drivers@vmware.com>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/misc/vmw_balloon.c
|
||||
|
||||
VMWARE VMXNET3 ETHERNET DRIVER
|
||||
M: Shreyas Bhatewara <sbhatewara@vmware.com>
|
||||
M: "VMware, Inc." <pv-drivers@vmware.com>
|
||||
|
|
|
|||
4
Makefile
4
Makefile
|
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 15
|
||||
PATCHLEVEL = 16
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION =
|
||||
EXTRAVERSION = -rc2
|
||||
NAME = Shuffling Zombie Juror
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
|||
|
|
@ -175,13 +175,6 @@ config ARCH_HAS_ILOG2_U32
|
|||
config ARCH_HAS_ILOG2_U64
|
||||
bool
|
||||
|
||||
config ARCH_HAS_CPUFREQ
|
||||
bool
|
||||
help
|
||||
Internal node to signify that the ARCH has CPUFREQ support
|
||||
and that the relevant menu configurations are displayed for
|
||||
it.
|
||||
|
||||
config ARCH_HAS_BANDGAP
|
||||
bool
|
||||
|
||||
|
|
@ -318,7 +311,6 @@ config ARCH_MULTIPLATFORM
|
|||
|
||||
config ARCH_INTEGRATOR
|
||||
bool "ARM Ltd. Integrator family"
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARM_AMBA
|
||||
select ARM_PATCH_PHYS_VIRT
|
||||
select AUTO_ZRELADDR
|
||||
|
|
@ -538,7 +530,6 @@ config ARCH_DOVE
|
|||
|
||||
config ARCH_KIRKWOOD
|
||||
bool "Marvell Kirkwood"
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select CPU_FEROCEON
|
||||
select GENERIC_CLOCKEVENTS
|
||||
|
|
@ -637,7 +628,6 @@ config ARCH_LPC32XX
|
|||
config ARCH_PXA
|
||||
bool "PXA2xx/PXA3xx-based"
|
||||
depends on MMU
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_MTD_XIP
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARM_CPU_SUSPEND if PM
|
||||
|
|
@ -707,7 +697,6 @@ config ARCH_RPC
|
|||
|
||||
config ARCH_SA1100
|
||||
bool "SA1100-based"
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_MTD_XIP
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARCH_SPARSEMEM_ENABLE
|
||||
|
|
@ -725,7 +714,6 @@ config ARCH_SA1100
|
|||
|
||||
config ARCH_S3C24XX
|
||||
bool "Samsung S3C24XX SoCs"
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ATAGS
|
||||
select CLKDEV_LOOKUP
|
||||
|
|
@ -746,7 +734,6 @@ config ARCH_S3C24XX
|
|||
|
||||
config ARCH_S3C64XX
|
||||
bool "Samsung S3C64XX"
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARM_AMBA
|
||||
select ARM_VIC
|
||||
|
|
@ -809,7 +796,6 @@ config ARCH_S5PC100
|
|||
|
||||
config ARCH_S5PV210
|
||||
bool "Samsung S5PV210/S5PC110"
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_HAS_HOLES_MEMORYMODEL
|
||||
select ARCH_SPARSEMEM_ENABLE
|
||||
select ATAGS
|
||||
|
|
@ -845,7 +831,6 @@ config ARCH_DAVINCI
|
|||
config ARCH_OMAP1
|
||||
bool "TI OMAP1"
|
||||
depends on MMU
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_HAS_HOLES_MEMORYMODEL
|
||||
select ARCH_OMAP
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
|
|
@ -1009,8 +994,6 @@ source "arch/arm/mach-rockchip/Kconfig"
|
|||
|
||||
source "arch/arm/mach-sa1100/Kconfig"
|
||||
|
||||
source "arch/arm/plat-samsung/Kconfig"
|
||||
|
||||
source "arch/arm/mach-socfpga/Kconfig"
|
||||
|
||||
source "arch/arm/mach-spear/Kconfig"
|
||||
|
|
@ -1028,6 +1011,7 @@ source "arch/arm/mach-s5pc100/Kconfig"
|
|||
source "arch/arm/mach-s5pv210/Kconfig"
|
||||
|
||||
source "arch/arm/mach-exynos/Kconfig"
|
||||
source "arch/arm/plat-samsung/Kconfig"
|
||||
|
||||
source "arch/arm/mach-shmobile/Kconfig"
|
||||
|
||||
|
|
@ -2109,9 +2093,7 @@ endmenu
|
|||
|
||||
menu "CPU Power Management"
|
||||
|
||||
if ARCH_HAS_CPUFREQ
|
||||
source "drivers/cpufreq/Kconfig"
|
||||
endif
|
||||
|
||||
source "drivers/cpuidle/Kconfig"
|
||||
|
||||
|
|
|
|||
|
|
@ -91,6 +91,8 @@
|
|||
marvell,nand-keep-config;
|
||||
marvell,nand-enable-arbiter;
|
||||
nand-on-flash-bbt;
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
|
|
|
|||
|
|
@ -98,6 +98,8 @@
|
|||
marvell,nand-keep-config;
|
||||
marvell,nand-enable-arbiter;
|
||||
nand-on-flash-bbt;
|
||||
nand-ecc-strength = <4>;
|
||||
nand-ecc-step-size = <512>;
|
||||
|
||||
partition@0 {
|
||||
label = "U-Boot";
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@
|
|||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0 0x00000000 0 0xC0000000>; /* 3 GB */
|
||||
reg = <0 0x00000000 0 0x40000000>; /* 1 GB soldered on */
|
||||
};
|
||||
|
||||
soc {
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@
|
|||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
atlclkin3_ck: atlclkin3_ck {
|
||||
atl_clkin3_ck: atl_clkin3_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <0>;
|
||||
|
|
@ -277,7 +277,7 @@
|
|||
|
||||
dpll_mpu_ck: dpll_mpu_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap4-dpll-clock";
|
||||
compatible = "ti,omap5-mpu-dpll-clock";
|
||||
clocks = <&sys_clkin1>, <&mpu_dpll_hs_clk_div>;
|
||||
reg = <0x0160>, <0x0164>, <0x016c>, <0x0168>;
|
||||
};
|
||||
|
|
@ -730,7 +730,7 @@
|
|||
mcasp1_ahclkr_mux: mcasp1_ahclkr_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atl_clkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
ti,bit-shift = <28>;
|
||||
reg = <0x0550>;
|
||||
};
|
||||
|
|
@ -738,7 +738,7 @@
|
|||
mcasp1_ahclkx_mux: mcasp1_ahclkx_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atl_clkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
ti,bit-shift = <24>;
|
||||
reg = <0x0550>;
|
||||
};
|
||||
|
|
@ -1639,7 +1639,7 @@
|
|||
mcasp2_ahclkr_mux: mcasp2_ahclkr_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atl_clkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
ti,bit-shift = <28>;
|
||||
reg = <0x1860>;
|
||||
};
|
||||
|
|
@ -1647,7 +1647,7 @@
|
|||
mcasp2_ahclkx_mux: mcasp2_ahclkx_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atl_clkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
ti,bit-shift = <24>;
|
||||
reg = <0x1860>;
|
||||
};
|
||||
|
|
@ -1663,7 +1663,7 @@
|
|||
mcasp3_ahclkx_mux: mcasp3_ahclkx_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atl_clkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
ti,bit-shift = <24>;
|
||||
reg = <0x1868>;
|
||||
};
|
||||
|
|
@ -1679,7 +1679,7 @@
|
|||
mcasp4_ahclkx_mux: mcasp4_ahclkx_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atl_clkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
ti,bit-shift = <24>;
|
||||
reg = <0x1898>;
|
||||
};
|
||||
|
|
@ -1695,7 +1695,7 @@
|
|||
mcasp5_ahclkx_mux: mcasp5_ahclkx_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atl_clkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
ti,bit-shift = <24>;
|
||||
reg = <0x1878>;
|
||||
};
|
||||
|
|
@ -1711,7 +1711,7 @@
|
|||
mcasp6_ahclkx_mux: mcasp6_ahclkx_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atl_clkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
ti,bit-shift = <24>;
|
||||
reg = <0x1904>;
|
||||
};
|
||||
|
|
@ -1727,7 +1727,7 @@
|
|||
mcasp7_ahclkx_mux: mcasp7_ahclkx_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atl_clkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
ti,bit-shift = <24>;
|
||||
reg = <0x1908>;
|
||||
};
|
||||
|
|
@ -1743,7 +1743,7 @@
|
|||
mcasp8_ahclk_mux: mcasp8_ahclk_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atlclkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
clocks = <&abe_24m_fclk>, <&abe_sys_clk_div>, <&func_24m_clk>, <&atl_clkin3_ck>, <&atl_clkin2_ck>, <&atl_clkin1_ck>, <&atl_clkin0_ck>, <&sys_clkin2>, <&ref_clkin0_ck>, <&ref_clkin1_ck>, <&ref_clkin2_ck>, <&ref_clkin3_ck>, <&mlb_clk>, <&mlbp_clk>;
|
||||
ti,bit-shift = <22>;
|
||||
reg = <0x1890>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -335,7 +335,7 @@
|
|||
|
||||
dpll_mpu_ck: dpll_mpu_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap4-dpll-clock";
|
||||
compatible = "ti,omap5-mpu-dpll-clock";
|
||||
clocks = <&sys_clkin>, <&mpu_dpll_hs_clk_div>;
|
||||
reg = <0x0160>, <0x0164>, <0x016c>, <0x0168>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -300,6 +300,7 @@ CONFIG_MMC=y
|
|||
CONFIG_MMC_BLOCK_MINORS=16
|
||||
CONFIG_MMC_ARMMMCI=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
CONFIG_MMC_SDHCI_OF_ARASAN=y
|
||||
CONFIG_MMC_SDHCI_ESDHC_IMX=y
|
||||
CONFIG_MMC_SDHCI_DOVE=y
|
||||
|
|
|
|||
|
|
@ -32,6 +32,7 @@ CONFIG_SOC_OMAP5=y
|
|||
CONFIG_SOC_AM33XX=y
|
||||
CONFIG_SOC_AM43XX=y
|
||||
CONFIG_SOC_DRA7XX=y
|
||||
CONFIG_CACHE_L2X0=y
|
||||
CONFIG_ARM_THUMBEE=y
|
||||
CONFIG_ARM_ERRATA_411920=y
|
||||
CONFIG_SMP=y
|
||||
|
|
|
|||
|
|
@ -52,7 +52,7 @@ extern inline void *return_address(unsigned int level)
|
|||
|
||||
#endif
|
||||
|
||||
#define ftrace_return_addr(n) return_address(n)
|
||||
#define ftrace_return_address(n) return_address(n)
|
||||
|
||||
#endif /* ifndef __ASSEMBLY__ */
|
||||
|
||||
|
|
|
|||
|
|
@ -1,10 +1,9 @@
|
|||
config ARCH_BCM
|
||||
menuconfig ARCH_BCM
|
||||
bool "Broadcom SoC Support" if ARCH_MULTI_V6_V7
|
||||
help
|
||||
This enables support for Broadcom ARM based SoC chips
|
||||
|
||||
menu "Broadcom SoC Selection"
|
||||
depends on ARCH_BCM
|
||||
if ARCH_BCM
|
||||
|
||||
config ARCH_BCM_MOBILE
|
||||
bool "Broadcom Mobile SoC Support" if ARCH_MULTI_V7
|
||||
|
|
@ -88,4 +87,4 @@ config ARCH_BCM_5301X
|
|||
different SoC or with the older BCM47XX and BCM53XX based
|
||||
network SoC using a MIPS CPU, they are supported by arch/mips/bcm47xx
|
||||
|
||||
endmenu
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
config ARCH_BERLIN
|
||||
menuconfig ARCH_BERLIN
|
||||
bool "Marvell Berlin SoCs" if ARCH_MULTI_V7
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARM_GIC
|
||||
|
|
@ -9,8 +9,6 @@ config ARCH_BERLIN
|
|||
|
||||
if ARCH_BERLIN
|
||||
|
||||
menu "Marvell Berlin SoC variants"
|
||||
|
||||
config MACH_BERLIN_BG2
|
||||
bool "Marvell Armada 1500 (BG2)"
|
||||
select CACHE_L2X0
|
||||
|
|
@ -30,6 +28,4 @@ config MACH_BERLIN_BG2Q
|
|||
select HAVE_ARM_TWD if SMP
|
||||
select PINCTRL_BERLIN_BG2Q
|
||||
|
||||
endmenu
|
||||
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -1,12 +1,11 @@
|
|||
config ARCH_CNS3XXX
|
||||
menuconfig ARCH_CNS3XXX
|
||||
bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6
|
||||
select ARM_GIC
|
||||
select PCI_DOMAINS if PCI
|
||||
help
|
||||
Support for Cavium Networks CNS3XXX platform.
|
||||
|
||||
menu "CNS3XXX platform type"
|
||||
depends on ARCH_CNS3XXX
|
||||
if ARCH_CNS3XXX
|
||||
|
||||
config MACH_CNS3420VB
|
||||
bool "Support for CNS3420 Validation Board"
|
||||
|
|
@ -17,4 +16,4 @@ config MACH_CNS3420VB
|
|||
This is a platform with an on-board ARM11 MPCore and has support
|
||||
for USB, USB-OTG, MMC/SD/SDIO, SATA, PCI-E, etc.
|
||||
|
||||
endmenu
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -39,7 +39,6 @@ config ARCH_DAVINCI_DA830
|
|||
config ARCH_DAVINCI_DA850
|
||||
bool "DA850/OMAP-L138/AM18x based system"
|
||||
select ARCH_DAVINCI_DA8XX
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select CP_INTC
|
||||
|
||||
config ARCH_DAVINCI_DA8XX
|
||||
|
|
|
|||
|
|
@ -7,10 +7,9 @@
|
|||
|
||||
# Configuration options for the EXYNOS4
|
||||
|
||||
config ARCH_EXYNOS
|
||||
menuconfig ARCH_EXYNOS
|
||||
bool "Samsung EXYNOS" if ARCH_MULTI_V7
|
||||
select ARCH_HAS_BANDGAP
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_HAS_HOLES_MEMORYMODEL
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARM_AMBA
|
||||
|
|
@ -30,8 +29,6 @@ config ARCH_EXYNOS
|
|||
|
||||
if ARCH_EXYNOS
|
||||
|
||||
menu "SAMSUNG EXYNOS SoCs Support"
|
||||
|
||||
config ARCH_EXYNOS3
|
||||
bool "SAMSUNG EXYNOS3"
|
||||
select ARM_CPU_SUSPEND if PM
|
||||
|
|
@ -118,8 +115,6 @@ config SOC_EXYNOS5800
|
|||
default y
|
||||
depends on SOC_EXYNOS5420
|
||||
|
||||
endmenu
|
||||
|
||||
config EXYNOS5420_MCPM
|
||||
bool "Exynos5420 Multi-Cluster PM support"
|
||||
depends on MCPM && SOC_EXYNOS5420
|
||||
|
|
|
|||
|
|
@ -118,6 +118,7 @@ extern void __iomem *sysram_ns_base_addr;
|
|||
extern void __iomem *sysram_base_addr;
|
||||
void exynos_init_io(void);
|
||||
void exynos_restart(enum reboot_mode mode, const char *cmd);
|
||||
void exynos_sysram_init(void);
|
||||
void exynos_cpuidle_init(void);
|
||||
void exynos_cpufreq_init(void);
|
||||
void exynos_init_late(void);
|
||||
|
|
|
|||
|
|
@ -184,6 +184,28 @@ void __init exynos_cpufreq_init(void)
|
|||
platform_device_register_simple("exynos-cpufreq", -1, NULL, 0);
|
||||
}
|
||||
|
||||
void __iomem *sysram_base_addr;
|
||||
void __iomem *sysram_ns_base_addr;
|
||||
|
||||
void __init exynos_sysram_init(void)
|
||||
{
|
||||
struct device_node *node;
|
||||
|
||||
for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
|
||||
if (!of_device_is_available(node))
|
||||
continue;
|
||||
sysram_base_addr = of_iomap(node, 0);
|
||||
break;
|
||||
}
|
||||
|
||||
for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
|
||||
if (!of_device_is_available(node))
|
||||
continue;
|
||||
sysram_ns_base_addr = of_iomap(node, 0);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void __init exynos_init_late(void)
|
||||
{
|
||||
if (of_machine_is_compatible("samsung,exynos5440"))
|
||||
|
|
@ -198,7 +220,7 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
|
|||
int depth, void *data)
|
||||
{
|
||||
struct map_desc iodesc;
|
||||
__be32 *reg;
|
||||
const __be32 *reg;
|
||||
int len;
|
||||
|
||||
if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") &&
|
||||
|
|
@ -271,6 +293,13 @@ static void __init exynos_dt_machine_init(void)
|
|||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* This is called from smp_prepare_cpus if we've built for SMP, but
|
||||
* we still need to set it up for PM and firmware ops if not.
|
||||
*/
|
||||
if (!IS_ENABLED(SMP))
|
||||
exynos_sysram_init();
|
||||
|
||||
exynos_cpuidle_init();
|
||||
exynos_cpufreq_init();
|
||||
|
||||
|
|
|
|||
|
|
@ -32,28 +32,6 @@
|
|||
|
||||
extern void exynos4_secondary_startup(void);
|
||||
|
||||
void __iomem *sysram_base_addr;
|
||||
void __iomem *sysram_ns_base_addr;
|
||||
|
||||
static void __init exynos_smp_prepare_sysram(void)
|
||||
{
|
||||
struct device_node *node;
|
||||
|
||||
for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") {
|
||||
if (!of_device_is_available(node))
|
||||
continue;
|
||||
sysram_base_addr = of_iomap(node, 0);
|
||||
break;
|
||||
}
|
||||
|
||||
for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") {
|
||||
if (!of_device_is_available(node))
|
||||
continue;
|
||||
sysram_ns_base_addr = of_iomap(node, 0);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void __iomem *cpu_boot_reg_base(void)
|
||||
{
|
||||
if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
|
||||
|
|
@ -234,11 +212,11 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
|
|||
{
|
||||
int i;
|
||||
|
||||
exynos_sysram_init();
|
||||
|
||||
if (read_cpuid_part_number() == ARM_CPU_PART_CORTEX_A9)
|
||||
scu_enable(scu_base_addr());
|
||||
|
||||
exynos_smp_prepare_sysram();
|
||||
|
||||
/*
|
||||
* Write the address of secondary startup into the
|
||||
* system-wide flags register. The boot monitor waits
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
config ARCH_HIGHBANK
|
||||
bool "Calxeda ECX-1000/2000 (Highbank/Midway)" if ARCH_MULTI_V7
|
||||
select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_HAS_HOLES_MEMORYMODEL
|
||||
select ARCH_HAS_OPP
|
||||
select ARCH_SUPPORTS_BIG_ENDIAN
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
config ARCH_MXC
|
||||
menuconfig ARCH_MXC
|
||||
bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_HAS_OPP
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARM_CPU_SUSPEND if PM
|
||||
|
|
@ -13,8 +12,7 @@ config ARCH_MXC
|
|||
help
|
||||
Support for Freescale MXC/iMX-based family of processors
|
||||
|
||||
menu "Freescale i.MX support"
|
||||
depends on ARCH_MXC
|
||||
if ARCH_MXC
|
||||
|
||||
config MXC_TZIC
|
||||
bool
|
||||
|
|
@ -99,7 +97,6 @@ config SOC_IMX25
|
|||
|
||||
config SOC_IMX27
|
||||
bool
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_HAS_OPP
|
||||
select CPU_ARM926T
|
||||
select IMX_HAVE_IOMUX_V1
|
||||
|
|
@ -124,7 +121,6 @@ config SOC_IMX35
|
|||
|
||||
config SOC_IMX5
|
||||
bool
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_HAS_OPP
|
||||
select ARCH_MXC_IOMUX_V3
|
||||
select MXC_TZIC
|
||||
|
|
@ -786,4 +782,4 @@ endif
|
|||
|
||||
source "arch/arm/mach-imx/devices/Kconfig"
|
||||
|
||||
endmenu
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -28,7 +28,7 @@ config ARCH_CINTEGRATOR
|
|||
bool
|
||||
|
||||
config INTEGRATOR_IMPD1
|
||||
tristate "Include support for Integrator/IM-PD1"
|
||||
bool "Include support for Integrator/IM-PD1"
|
||||
depends on ARCH_INTEGRATOR_AP
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARM_VIC
|
||||
|
|
|
|||
|
|
@ -308,7 +308,12 @@ static struct impd1_device impd1_devs[] = {
|
|||
*/
|
||||
#define IMPD1_VALID_IRQS 0x00000bffU
|
||||
|
||||
static int __init impd1_probe(struct lm_device *dev)
|
||||
/*
|
||||
* As this module is bool, it is OK to have this as __init_refok() - no
|
||||
* probe calls will be done after the initial system bootup, as devices
|
||||
* are discovered as part of the machine startup.
|
||||
*/
|
||||
static int __init_refok impd1_probe(struct lm_device *dev)
|
||||
{
|
||||
struct impd1_module *impd1;
|
||||
int irq_base;
|
||||
|
|
@ -397,6 +402,11 @@ static void impd1_remove(struct lm_device *dev)
|
|||
static struct lm_driver impd1_driver = {
|
||||
.drv = {
|
||||
.name = "impd1",
|
||||
/*
|
||||
* As we're dropping the probe() function, suppress driver
|
||||
* binding from sysfs.
|
||||
*/
|
||||
.suppress_bind_attrs = true,
|
||||
},
|
||||
.probe = impd1_probe,
|
||||
.remove = impd1_remove,
|
||||
|
|
|
|||
|
|
@ -1,6 +1,7 @@
|
|||
config ARCH_KEYSTONE
|
||||
bool "Texas Instruments Keystone Devices"
|
||||
depends on ARCH_MULTI_V7
|
||||
depends on ARM_PATCH_PHYS_VIRT
|
||||
select ARM_GIC
|
||||
select HAVE_ARM_ARCH_TIMER
|
||||
select CLKSRC_MMIO
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
config ARCH_MOXART
|
||||
menuconfig ARCH_MOXART
|
||||
bool "MOXA ART SoC" if ARCH_MULTI_V4
|
||||
select CPU_FA526
|
||||
select ARM_DMA_MEM_BUFFERABLE
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
config ARCH_MVEBU
|
||||
menuconfig ARCH_MVEBU
|
||||
bool "Marvell Engineering Business Unit (MVEBU) SoCs" if (ARCH_MULTI_V7 || ARCH_MULTI_V5)
|
||||
select ARCH_SUPPORTS_BIG_ENDIAN
|
||||
select CLKSRC_MMIO
|
||||
|
|
@ -13,8 +13,6 @@ config ARCH_MVEBU
|
|||
|
||||
if ARCH_MVEBU
|
||||
|
||||
menu "Marvell EBU SoC variants"
|
||||
|
||||
config MACH_MVEBU_V7
|
||||
bool
|
||||
select ARMADA_370_XP_TIMER
|
||||
|
|
@ -84,7 +82,6 @@ config MACH_DOVE
|
|||
|
||||
config MACH_KIRKWOOD
|
||||
bool "Marvell Kirkwood boards" if ARCH_MULTI_V5
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select CPU_FEROCEON
|
||||
select KIRKWOOD_CLK
|
||||
|
|
@ -97,6 +94,4 @@ config MACH_KIRKWOOD
|
|||
Say 'Y' here if you want your kernel to support boards based
|
||||
on the Marvell Kirkwood device tree.
|
||||
|
||||
endmenu
|
||||
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
config ARCH_NOMADIK
|
||||
menuconfig ARCH_NOMADIK
|
||||
bool "ST-Ericsson Nomadik"
|
||||
depends on ARCH_MULTI_V5
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
|
|
@ -15,7 +15,6 @@ config ARCH_NOMADIK
|
|||
Support for the Nomadik platform by ST-Ericsson
|
||||
|
||||
if ARCH_NOMADIK
|
||||
menu "Nomadik boards"
|
||||
|
||||
config MACH_NOMADIK_8815NHK
|
||||
bool "ST 8815 Nomadik Hardware Kit (evaluation board)"
|
||||
|
|
@ -24,7 +23,6 @@ config MACH_NOMADIK_8815NHK
|
|||
select I2C_ALGOBIT
|
||||
select I2C_NOMADIK
|
||||
|
||||
endmenu
|
||||
endif
|
||||
|
||||
config NOMADIK_8815
|
||||
|
|
|
|||
|
|
@ -1,3 +1,6 @@
|
|||
menu "TI OMAP/AM/DM/DRA Family"
|
||||
depends on ARCH_MULTI_V6 || ARCH_MULTI_V7
|
||||
|
||||
config ARCH_OMAP
|
||||
bool
|
||||
|
||||
|
|
@ -28,7 +31,6 @@ config ARCH_OMAP4
|
|||
select ARM_CPU_SUSPEND if PM
|
||||
select ARM_ERRATA_720789
|
||||
select ARM_GIC
|
||||
select CACHE_L2X0
|
||||
select HAVE_ARM_SCU if SMP
|
||||
select HAVE_ARM_TWD if SMP
|
||||
select OMAP_INTERCONNECT
|
||||
|
|
@ -80,7 +82,6 @@ config SOC_DRA7XX
|
|||
config ARCH_OMAP2PLUS
|
||||
bool
|
||||
select ARCH_HAS_BANDGAP
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_HAS_HOLES_MEMORYMODEL
|
||||
select ARCH_OMAP
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
|
|
@ -343,3 +344,5 @@ config OMAP4_ERRATA_I688
|
|||
endmenu
|
||||
|
||||
endif
|
||||
|
||||
endmenu
|
||||
|
|
|
|||
|
|
@ -208,3 +208,56 @@ void omap2xxx_clkt_vps_late_init(void)
|
|||
clk_put(c);
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
#include <linux/clk-provider.h>
|
||||
#include <linux/clkdev.h>
|
||||
|
||||
static const struct clk_ops virt_prcm_set_ops = {
|
||||
.recalc_rate = &omap2_table_mpu_recalc,
|
||||
.set_rate = &omap2_select_table_rate,
|
||||
.round_rate = &omap2_round_to_table_rate,
|
||||
};
|
||||
|
||||
/**
|
||||
* omap2xxx_clkt_vps_init - initialize virt_prcm_set clock
|
||||
*
|
||||
* Does a manual init for the virtual prcm DVFS clock for OMAP2. This
|
||||
* function is called only from omap2 DT clock init, as the virtual
|
||||
* node is not modelled in the DT clock data.
|
||||
*/
|
||||
void omap2xxx_clkt_vps_init(void)
|
||||
{
|
||||
struct clk_init_data init = { NULL };
|
||||
struct clk_hw_omap *hw = NULL;
|
||||
struct clk *clk;
|
||||
const char *parent_name = "mpu_ck";
|
||||
struct clk_lookup *lookup = NULL;
|
||||
|
||||
omap2xxx_clkt_vps_late_init();
|
||||
omap2xxx_clkt_vps_check_bootloader_rates();
|
||||
|
||||
hw = kzalloc(sizeof(*hw), GFP_KERNEL);
|
||||
lookup = kzalloc(sizeof(*lookup), GFP_KERNEL);
|
||||
if (!hw || !lookup)
|
||||
goto cleanup;
|
||||
init.name = "virt_prcm_set";
|
||||
init.ops = &virt_prcm_set_ops;
|
||||
init.parent_names = &parent_name;
|
||||
init.num_parents = 1;
|
||||
|
||||
hw->hw.init = &init;
|
||||
|
||||
clk = clk_register(NULL, &hw->hw);
|
||||
|
||||
lookup->dev_id = NULL;
|
||||
lookup->con_id = "cpufreq_ck";
|
||||
lookup->clk = clk;
|
||||
|
||||
clkdev_add(lookup);
|
||||
return;
|
||||
cleanup:
|
||||
kfree(hw);
|
||||
kfree(lookup);
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -178,17 +178,6 @@ struct clksel {
|
|||
const struct clksel_rate *rates;
|
||||
};
|
||||
|
||||
struct clk_hw_omap_ops {
|
||||
void (*find_idlest)(struct clk_hw_omap *oclk,
|
||||
void __iomem **idlest_reg,
|
||||
u8 *idlest_bit, u8 *idlest_val);
|
||||
void (*find_companion)(struct clk_hw_omap *oclk,
|
||||
void __iomem **other_reg,
|
||||
u8 *other_bit);
|
||||
void (*allow_idle)(struct clk_hw_omap *oclk);
|
||||
void (*deny_idle)(struct clk_hw_omap *oclk);
|
||||
};
|
||||
|
||||
unsigned long omap_fixed_divisor_recalc(struct clk_hw *hw,
|
||||
unsigned long parent_rate);
|
||||
|
||||
|
|
@ -279,8 +268,6 @@ extern const struct clk_hw_omap_ops clkhwops_omap3430es2_hsotgusb_wait;
|
|||
extern const struct clk_hw_omap_ops clkhwops_am35xx_ipss_module_wait;
|
||||
extern const struct clk_hw_omap_ops clkhwops_apll54;
|
||||
extern const struct clk_hw_omap_ops clkhwops_apll96;
|
||||
extern const struct clk_hw_omap_ops clkhwops_omap2xxx_dpll;
|
||||
extern const struct clk_hw_omap_ops clkhwops_omap2430_i2chs_wait;
|
||||
|
||||
/* clksel_rate blocks shared between OMAP44xx and AM33xx */
|
||||
extern const struct clksel_rate div_1_0_rates[];
|
||||
|
|
|
|||
|
|
@ -21,10 +21,6 @@ unsigned long omap2xxx_sys_clk_recalc(struct clk_hw *clk,
|
|||
unsigned long parent_rate);
|
||||
unsigned long omap2_osc_clk_recalc(struct clk_hw *clk,
|
||||
unsigned long parent_rate);
|
||||
unsigned long omap2_dpllcore_recalc(struct clk_hw *hw,
|
||||
unsigned long parent_rate);
|
||||
int omap2_reprogram_dpllcore(struct clk_hw *clk, unsigned long rate,
|
||||
unsigned long parent_rate);
|
||||
void omap2xxx_clkt_dpllcore_init(struct clk_hw *hw);
|
||||
unsigned long omap2_clk_apll54_recalc(struct clk_hw *hw,
|
||||
unsigned long parent_rate);
|
||||
|
|
|
|||
|
|
@ -91,7 +91,14 @@ extern void omap3_sync32k_timer_init(void);
|
|||
extern void omap3_secure_sync32k_timer_init(void);
|
||||
extern void omap3_gptimer_timer_init(void);
|
||||
extern void omap4_local_timer_init(void);
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
int omap_l2_cache_init(void);
|
||||
#else
|
||||
static inline int omap_l2_cache_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
extern void omap5_realtime_timer_init(void);
|
||||
|
||||
void omap2420_init_early(void);
|
||||
|
|
|
|||
|
|
@ -319,6 +319,15 @@ static int omap3_noncore_dpll_program(struct clk_hw_omap *clk, u16 freqsel)
|
|||
|
||||
/* Set DPLL multiplier, divider */
|
||||
v = omap2_clk_readl(clk, dd->mult_div1_reg);
|
||||
|
||||
/* Handle Duty Cycle Correction */
|
||||
if (dd->dcc_mask) {
|
||||
if (dd->last_rounded_rate >= dd->dcc_rate)
|
||||
v |= dd->dcc_mask; /* Enable DCC */
|
||||
else
|
||||
v &= ~dd->dcc_mask; /* Disable DCC */
|
||||
}
|
||||
|
||||
v &= ~(dd->mult_mask | dd->div1_mask);
|
||||
v |= dd->last_rounded_m << __ffs(dd->mult_mask);
|
||||
v |= (dd->last_rounded_n - 1) << __ffs(dd->div1_mask);
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
config ARCH_SIRF
|
||||
menuconfig ARCH_SIRF
|
||||
bool "CSR SiRF" if ARCH_MULTI_V7
|
||||
select ARCH_HAS_RESET_CONTROLLER
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
|
|
@ -11,7 +11,7 @@ config ARCH_SIRF
|
|||
|
||||
if ARCH_SIRF
|
||||
|
||||
menu "CSR SiRF atlas6/primaII/Marco/Polo Specific Features"
|
||||
comment "CSR SiRF atlas6/primaII/Marco/Polo Specific Features"
|
||||
|
||||
config ARCH_ATLAS6
|
||||
bool "CSR SiRFSoC ATLAS6 ARM Cortex A9 Platform"
|
||||
|
|
@ -37,8 +37,6 @@ config ARCH_MARCO
|
|||
help
|
||||
Support for CSR SiRFSoC ARM Cortex A9 Platform
|
||||
|
||||
endmenu
|
||||
|
||||
config SIRF_IRQ
|
||||
bool
|
||||
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
config ARCH_QCOM
|
||||
menuconfig ARCH_QCOM
|
||||
bool "Qualcomm Support" if ARCH_MULTI_V7
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARM_GIC
|
||||
|
|
@ -11,8 +11,6 @@ config ARCH_QCOM
|
|||
|
||||
if ARCH_QCOM
|
||||
|
||||
menu "Qualcomm SoC Selection"
|
||||
|
||||
config ARCH_MSM8X60
|
||||
bool "Enable support for MSM8X60"
|
||||
select CLKSRC_QCOM
|
||||
|
|
@ -25,8 +23,6 @@ config ARCH_MSM8974
|
|||
bool "Enable support for MSM8974"
|
||||
select HAVE_ARM_ARCH_TIMER
|
||||
|
||||
endmenu
|
||||
|
||||
config QCOM_SCM
|
||||
bool
|
||||
|
||||
|
|
|
|||
|
|
@ -117,7 +117,7 @@ config S3C24XX_SETUP_TS
|
|||
Compile in platform device definition for Samsung TouchScreen.
|
||||
|
||||
config S3C24XX_DMA
|
||||
bool "S3C2410 DMA support"
|
||||
bool "S3C2410 DMA support (deprecated)"
|
||||
select S3C_DMA
|
||||
help
|
||||
S3C2410 DMA support. This is needed for drivers like sound which
|
||||
|
|
|
|||
|
|
@ -18,9 +18,9 @@ config CPU_S3C6410
|
|||
Enable S3C6410 CPU support
|
||||
|
||||
config S3C64XX_PL080
|
||||
bool "S3C64XX DMA using generic PL08x driver"
|
||||
def_bool DMADEVICES
|
||||
select ARM_AMBA
|
||||
select AMBA_PL08X
|
||||
select SAMSUNG_DMADEV
|
||||
|
||||
config S3C64XX_SETUP_SDHCI
|
||||
bool
|
||||
|
|
|
|||
|
|
@ -9,16 +9,18 @@ if ARCH_S5P64X0
|
|||
|
||||
config CPU_S5P6440
|
||||
bool
|
||||
select ARM_AMBA
|
||||
select PL330_DMA if DMADEVICES
|
||||
select S5P_SLEEP if PM
|
||||
select SAMSUNG_DMADEV
|
||||
select SAMSUNG_WAKEMASK if PM
|
||||
help
|
||||
Enable S5P6440 CPU support
|
||||
|
||||
config CPU_S5P6450
|
||||
bool
|
||||
select ARM_AMBA
|
||||
select PL330_DMA if DMADEVICES
|
||||
select S5P_SLEEP if PM
|
||||
select SAMSUNG_DMADEV
|
||||
select SAMSUNG_WAKEMASK if PM
|
||||
help
|
||||
Enable S5P6450 CPU support
|
||||
|
|
|
|||
|
|
@ -9,8 +9,9 @@ if ARCH_S5PC100
|
|||
|
||||
config CPU_S5PC100
|
||||
bool
|
||||
select ARM_AMBA
|
||||
select PL330_DMA if DMADEVICES
|
||||
select S5P_EXT_INT
|
||||
select SAMSUNG_DMADEV
|
||||
help
|
||||
Enable S5PC100 CPU support
|
||||
|
||||
|
|
|
|||
|
|
@ -11,10 +11,11 @@ if ARCH_S5PV210
|
|||
|
||||
config CPU_S5PV210
|
||||
bool
|
||||
select ARM_AMBA
|
||||
select PL330_DMA if DMADEVICES
|
||||
select S5P_EXT_INT
|
||||
select S5P_PM if PM
|
||||
select S5P_SLEEP if PM
|
||||
select SAMSUNG_DMADEV
|
||||
help
|
||||
Enable S5PV210 CPU support
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
config ARCH_SHMOBILE
|
||||
bool
|
||||
|
||||
config ARCH_SHMOBILE_MULTI
|
||||
menuconfig ARCH_SHMOBILE_MULTI
|
||||
bool "Renesas ARM SoCs" if ARCH_MULTI_V7
|
||||
depends on MMU
|
||||
select ARCH_SHMOBILE
|
||||
|
|
@ -15,7 +15,7 @@ config ARCH_SHMOBILE_MULTI
|
|||
|
||||
if ARCH_SHMOBILE_MULTI
|
||||
|
||||
comment "Renesas ARM SoCs System Type"
|
||||
#comment "Renesas ARM SoCs System Type"
|
||||
|
||||
config ARCH_EMEV2
|
||||
bool "Emma Mobile EV2"
|
||||
|
|
@ -85,7 +85,6 @@ config ARCH_R8A73A4
|
|||
select CPU_V7
|
||||
select SH_CLK_CPG
|
||||
select RENESAS_IRQC
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_HAS_OPP
|
||||
select SYS_SUPPORTS_SH_CMT
|
||||
select SYS_SUPPORTS_SH_TMU
|
||||
|
|
@ -264,7 +263,6 @@ config MACH_KOELSCH
|
|||
config MACH_KZM9G
|
||||
bool "KZM-A9-GT board"
|
||||
depends on ARCH_SH73A0
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_HAS_OPP
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
|
|
|
|||
|
|
@ -14,7 +14,6 @@ if PLAT_SPEAR
|
|||
config ARCH_SPEAR13XX
|
||||
bool "ST SPEAr13xx"
|
||||
depends on ARCH_MULTI_V7 || PLAT_SPEAR_SINGLE
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARM_GIC
|
||||
select GPIO_SPEAR_SPICS
|
||||
select HAVE_ARM_SCU if SMP
|
||||
|
|
|
|||
|
|
@ -1,5 +1,5 @@
|
|||
menuconfig ARCH_STI
|
||||
bool "STMicroelectronics Consumer Electronics SOCs with Device Trees" if ARCH_MULTI_V7
|
||||
bool "STMicroelectronics Consumer Electronics SOCs" if ARCH_MULTI_V7
|
||||
select ARM_GIC
|
||||
select ARM_GLOBAL_TIMER
|
||||
select PINCTRL
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
config ARCH_TEGRA
|
||||
menuconfig ARCH_TEGRA
|
||||
bool "NVIDIA Tegra" if ARCH_MULTI_V7
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARCH_SUPPORTS_TRUSTED_FOUNDATIONS
|
||||
select ARM_GIC
|
||||
|
|
@ -16,8 +15,7 @@ config ARCH_TEGRA
|
|||
help
|
||||
This enables support for NVIDIA Tegra based systems.
|
||||
|
||||
menu "NVIDIA Tegra options"
|
||||
depends on ARCH_TEGRA
|
||||
if ARCH_TEGRA
|
||||
|
||||
config ARCH_TEGRA_2x_SOC
|
||||
bool "Enable support for Tegra20 family"
|
||||
|
|
@ -69,4 +67,4 @@ config TEGRA_AHB
|
|||
which controls AHB bus master arbitration and some
|
||||
performance parameters(priority, prefech size).
|
||||
|
||||
endmenu
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
config ARCH_U300
|
||||
menuconfig ARCH_U300
|
||||
bool "ST-Ericsson U300 Series" if ARCH_MULTI_V5
|
||||
depends on MMU
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
|
|
@ -16,8 +16,6 @@ config ARCH_U300
|
|||
|
||||
if ARCH_U300
|
||||
|
||||
menu "ST-Ericsson AB U300/U335 Platform"
|
||||
|
||||
config MACH_U300
|
||||
depends on ARCH_U300
|
||||
bool "U300"
|
||||
|
|
@ -43,6 +41,4 @@ config MACH_U300_SPIDUMMY
|
|||
you don't need it. Selecting this will activate the
|
||||
SPI framework and ARM PL022 support.
|
||||
|
||||
endmenu
|
||||
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -1,9 +1,8 @@
|
|||
config ARCH_U8500
|
||||
menuconfig ARCH_U8500
|
||||
bool "ST-Ericsson U8500 Series" if ARCH_MULTI_V7
|
||||
depends on MMU
|
||||
select AB8500_CORE
|
||||
select ABX500_CORE
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARM_AMBA
|
||||
select ARM_ERRATA_754322
|
||||
|
|
@ -34,8 +33,6 @@ config UX500_SOC_DB8500
|
|||
select REGULATOR
|
||||
select REGULATOR_DB8500_PRCMU
|
||||
|
||||
menu "Ux500 target platform (boards)"
|
||||
|
||||
config MACH_MOP500
|
||||
bool "U8500 Development platform, MOP500 versions"
|
||||
select I2C
|
||||
|
|
@ -68,8 +65,6 @@ config UX500_AUTO_PLATFORM
|
|||
a working kernel. If everything else is disabled, this
|
||||
automatically enables MACH_MOP500.
|
||||
|
||||
endmenu
|
||||
|
||||
config UX500_DEBUG_UART
|
||||
int "Ux500 UART to use for low-level debug"
|
||||
default 2
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
config ARCH_VEXPRESS
|
||||
menuconfig ARCH_VEXPRESS
|
||||
bool "ARM Ltd. Versatile Express family" if ARCH_MULTI_V7
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARCH_SUPPORTS_BIG_ENDIAN
|
||||
|
|
@ -37,8 +37,7 @@ config ARCH_VEXPRESS
|
|||
platforms. The traditional (ATAGs) boot method is not usable on
|
||||
these boards with this option.
|
||||
|
||||
menu "Versatile Express platform type"
|
||||
depends on ARCH_VEXPRESS
|
||||
if ARCH_VEXPRESS
|
||||
|
||||
config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA
|
||||
bool "Enable A5 and A9 only errata work-arounds"
|
||||
|
|
@ -65,7 +64,6 @@ config ARCH_VEXPRESS_DCSCB
|
|||
|
||||
config ARCH_VEXPRESS_SPC
|
||||
bool "Versatile Express Serial Power Controller (SPC)"
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_HAS_OPP
|
||||
select PM_OPP
|
||||
help
|
||||
|
|
@ -83,4 +81,4 @@ config ARCH_VEXPRESS_TC2_PM
|
|||
Support for CPU and cluster power management on Versatile Express
|
||||
with a TC2 (A15x2 A7x3) big.LITTLE core tile.
|
||||
|
||||
endmenu
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
config ARCH_VT8500
|
||||
bool
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select CLKDEV_LOOKUP
|
||||
select VT8500_TIMER
|
||||
|
|
|
|||
|
|
@ -1,6 +1,5 @@
|
|||
config ARCH_ZYNQ
|
||||
bool "Xilinx Zynq ARM Cortex A9 Platform" if ARCH_MULTI_V7
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_HAS_OPP
|
||||
select ARCH_SUPPORTS_BIG_ENDIAN
|
||||
select ARM_AMBA
|
||||
|
|
|
|||
|
|
@ -35,27 +35,15 @@ config SAMSUNG_PM
|
|||
Base platform power management code for samsung code
|
||||
|
||||
if PLAT_SAMSUNG
|
||||
menu "Samsung Common options"
|
||||
|
||||
# boot configurations
|
||||
|
||||
comment "Boot options"
|
||||
|
||||
config S3C_BOOT_ERROR_RESET
|
||||
bool "S3C Reboot on decompression error"
|
||||
help
|
||||
Say y here to use the watchdog to reset the system if the
|
||||
kernel decompressor detects an error during decompression.
|
||||
|
||||
config S3C_BOOT_UART_FORCE_FIFO
|
||||
bool "Force UART FIFO on during boot process"
|
||||
default y
|
||||
help
|
||||
Say Y here to force the UART FIFOs on during the kernel
|
||||
uncompressor
|
||||
|
||||
|
||||
config S3C_LOWLEVEL_UART_PORT
|
||||
int "S3C UART to use for low-level messages"
|
||||
depends on ARCH_S3C64XX
|
||||
default 0
|
||||
help
|
||||
Choice of which UART port to use for the low-level messages,
|
||||
|
|
@ -407,17 +395,16 @@ config SAMSUNG_PM_GPIO
|
|||
Include legacy GPIO power management code for platforms not using
|
||||
pinctrl-samsung driver.
|
||||
|
||||
endif
|
||||
|
||||
config SAMSUNG_DMADEV
|
||||
bool
|
||||
select ARM_AMBA
|
||||
bool "Use legacy Samsung DMA abstraction"
|
||||
depends on CPU_S5PV210 || CPU_S5PC100 || ARCH_S5P64X0 || ARCH_S3C64XX
|
||||
select DMADEVICES
|
||||
select PL330_DMA if (ARCH_EXYNOS5 || ARCH_EXYNOS4 || CPU_S5PV210 || CPU_S5PC100 || \
|
||||
CPU_S5P6450 || CPU_S5P6440)
|
||||
default y
|
||||
help
|
||||
Use DMA device engine for PL330 DMAC.
|
||||
|
||||
endif
|
||||
|
||||
config S5P_DEV_MFC
|
||||
bool
|
||||
help
|
||||
|
|
@ -503,4 +490,5 @@ config DEBUG_S3C_UART
|
|||
default "2" if DEBUG_S3C_UART2
|
||||
default "3" if DEBUG_S3C_UART3
|
||||
|
||||
endmenu
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -1,8 +1,9 @@
|
|||
config ARM64
|
||||
def_bool y
|
||||
select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
|
||||
select ARCH_USE_CMPXCHG_LOCKREF
|
||||
select ARCH_HAS_OPP
|
||||
select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
|
||||
select ARCH_USE_CMPXCHG_LOCKREF
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
|
||||
select ARCH_WANT_FRAME_POINTERS
|
||||
|
|
|
|||
|
|
@ -24,3 +24,7 @@
|
|||
reg = < 0x1 0x00000000 0x0 0x80000000 >; /* Updated by bootloader */
|
||||
};
|
||||
};
|
||||
|
||||
&serial0 {
|
||||
status = "ok";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -273,8 +273,9 @@
|
|||
};
|
||||
|
||||
serial0: serial@1c020000 {
|
||||
status = "disabled";
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
compatible = "ns16550a";
|
||||
reg = <0 0x1c020000 0x0 0x1000>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <10000000>; /* Updated by bootloader */
|
||||
|
|
@ -282,6 +283,39 @@
|
|||
interrupts = <0x0 0x4c 0x4>;
|
||||
};
|
||||
|
||||
serial1: serial@1c021000 {
|
||||
status = "disabled";
|
||||
device_type = "serial";
|
||||
compatible = "ns16550a";
|
||||
reg = <0 0x1c021000 0x0 0x1000>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <10000000>; /* Updated by bootloader */
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0x0 0x4d 0x4>;
|
||||
};
|
||||
|
||||
serial2: serial@1c022000 {
|
||||
status = "disabled";
|
||||
device_type = "serial";
|
||||
compatible = "ns16550a";
|
||||
reg = <0 0x1c022000 0x0 0x1000>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <10000000>; /* Updated by bootloader */
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0x0 0x4e 0x4>;
|
||||
};
|
||||
|
||||
serial3: serial@1c023000 {
|
||||
status = "disabled";
|
||||
device_type = "serial";
|
||||
compatible = "ns16550a";
|
||||
reg = <0 0x1c023000 0x0 0x1000>;
|
||||
reg-shift = <2>;
|
||||
clock-frequency = <10000000>; /* Updated by bootloader */
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0x0 0x4f 0x4>;
|
||||
};
|
||||
|
||||
phy1: phy@1f21a000 {
|
||||
compatible = "apm,xgene-phy";
|
||||
reg = <0x0 0x1f21a000 0x0 0x100>;
|
||||
|
|
|
|||
|
|
@ -6,9 +6,18 @@ CONFIG_NO_HZ_IDLE=y
|
|||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_BSD_PROCESS_ACCT=y
|
||||
CONFIG_BSD_PROCESS_ACCT_V3=y
|
||||
CONFIG_TASKSTATS=y
|
||||
CONFIG_TASK_DELAY_ACCT=y
|
||||
CONFIG_TASK_XACCT=y
|
||||
CONFIG_TASK_IO_ACCOUNTING=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_RESOURCE_COUNTERS=y
|
||||
CONFIG_MEMCG=y
|
||||
CONFIG_MEMCG_SWAP=y
|
||||
CONFIG_MEMCG_KMEM=y
|
||||
CONFIG_CGROUP_HUGETLB=y
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_IPC_NS is not set
|
||||
# CONFIG_PID_NS is not set
|
||||
|
|
@ -27,6 +36,7 @@ CONFIG_ARCH_VEXPRESS=y
|
|||
CONFIG_ARCH_XGENE=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_KSM=y
|
||||
CONFIG_TRANSPARENT_HUGEPAGE=y
|
||||
CONFIG_CMA=y
|
||||
CONFIG_CMDLINE="console=ttyAMA0"
|
||||
|
|
@ -45,6 +55,7 @@ CONFIG_IP_PNP_BOOTP=y
|
|||
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
|
||||
CONFIG_DEVTMPFS=y
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_VIRTIO_BLK=y
|
||||
# CONFIG_SCSI_PROC_FS is not set
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
|
|
@ -53,6 +64,7 @@ CONFIG_ATA=y
|
|||
CONFIG_PATA_PLATFORM=y
|
||||
CONFIG_PATA_OF_PLATFORM=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_TUN=y
|
||||
CONFIG_SMC91X=y
|
||||
CONFIG_SMSC911X=y
|
||||
# CONFIG_WLAN is not set
|
||||
|
|
@ -85,6 +97,8 @@ CONFIG_EXT3_FS=y
|
|||
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_FANOTIFY=y
|
||||
CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y
|
||||
CONFIG_FUSE_FS=y
|
||||
CONFIG_CUSE=y
|
||||
CONFIG_VFAT_FS=y
|
||||
|
|
@ -104,6 +118,7 @@ CONFIG_DEBUG_KERNEL=y
|
|||
CONFIG_LOCKUP_DETECTOR=y
|
||||
# CONFIG_SCHED_DEBUG is not set
|
||||
# CONFIG_FTRACE is not set
|
||||
CONFIG_SECURITY=y
|
||||
CONFIG_CRYPTO_ANSI_CPRNG=y
|
||||
CONFIG_ARM64_CRYPTO=y
|
||||
CONFIG_CRYPTO_SHA1_ARM64_CE=y
|
||||
|
|
|
|||
|
|
@ -3,14 +3,6 @@
|
|||
*
|
||||
* Copyright (C) 2014 Linaro Ltd. <ard.biesheuvel@linaro.org>
|
||||
*
|
||||
* Based on arch/x86/crypto/ghash-pmullni-intel_asm.S
|
||||
*
|
||||
* Copyright (c) 2009 Intel Corp.
|
||||
* Author: Huang Ying <ying.huang@intel.com>
|
||||
* Vinodh Gopal
|
||||
* Erdinc Ozturk
|
||||
* Deniz Karakoyunlu
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License version 2 as published
|
||||
* by the Free Software Foundation.
|
||||
|
|
@ -19,13 +11,15 @@
|
|||
#include <linux/linkage.h>
|
||||
#include <asm/assembler.h>
|
||||
|
||||
DATA .req v0
|
||||
SHASH .req v1
|
||||
IN1 .req v2
|
||||
SHASH .req v0
|
||||
SHASH2 .req v1
|
||||
T1 .req v2
|
||||
T2 .req v3
|
||||
T3 .req v4
|
||||
VZR .req v5
|
||||
MASK .req v4
|
||||
XL .req v5
|
||||
XM .req v6
|
||||
XH .req v7
|
||||
IN1 .req v7
|
||||
|
||||
.text
|
||||
.arch armv8-a+crypto
|
||||
|
|
@ -35,61 +29,51 @@
|
|||
* struct ghash_key const *k, const char *head)
|
||||
*/
|
||||
ENTRY(pmull_ghash_update)
|
||||
ld1 {DATA.16b}, [x1]
|
||||
ld1 {SHASH.16b}, [x3]
|
||||
eor VZR.16b, VZR.16b, VZR.16b
|
||||
ld1 {XL.16b}, [x1]
|
||||
movi MASK.16b, #0xe1
|
||||
ext SHASH2.16b, SHASH.16b, SHASH.16b, #8
|
||||
shl MASK.2d, MASK.2d, #57
|
||||
eor SHASH2.16b, SHASH2.16b, SHASH.16b
|
||||
|
||||
/* do the head block first, if supplied */
|
||||
cbz x4, 0f
|
||||
ld1 {IN1.2d}, [x4]
|
||||
ld1 {T1.2d}, [x4]
|
||||
b 1f
|
||||
|
||||
0: ld1 {IN1.2d}, [x2], #16
|
||||
0: ld1 {T1.2d}, [x2], #16
|
||||
sub w0, w0, #1
|
||||
1: ext IN1.16b, IN1.16b, IN1.16b, #8
|
||||
CPU_LE( rev64 IN1.16b, IN1.16b )
|
||||
eor DATA.16b, DATA.16b, IN1.16b
|
||||
|
||||
/* multiply DATA by SHASH in GF(2^128) */
|
||||
ext T2.16b, DATA.16b, DATA.16b, #8
|
||||
ext T3.16b, SHASH.16b, SHASH.16b, #8
|
||||
eor T2.16b, T2.16b, DATA.16b
|
||||
eor T3.16b, T3.16b, SHASH.16b
|
||||
1: /* multiply XL by SHASH in GF(2^128) */
|
||||
CPU_LE( rev64 T1.16b, T1.16b )
|
||||
|
||||
pmull2 T1.1q, SHASH.2d, DATA.2d // a1 * b1
|
||||
pmull DATA.1q, SHASH.1d, DATA.1d // a0 * b0
|
||||
pmull T2.1q, T2.1d, T3.1d // (a1 + a0)(b1 + b0)
|
||||
eor T2.16b, T2.16b, T1.16b // (a0 * b1) + (a1 * b0)
|
||||
eor T2.16b, T2.16b, DATA.16b
|
||||
|
||||
ext T3.16b, VZR.16b, T2.16b, #8
|
||||
ext T2.16b, T2.16b, VZR.16b, #8
|
||||
eor DATA.16b, DATA.16b, T3.16b
|
||||
eor T1.16b, T1.16b, T2.16b // <T1:DATA> is result of
|
||||
// carry-less multiplication
|
||||
|
||||
/* first phase of the reduction */
|
||||
shl T3.2d, DATA.2d, #1
|
||||
eor T3.16b, T3.16b, DATA.16b
|
||||
shl T3.2d, T3.2d, #5
|
||||
eor T3.16b, T3.16b, DATA.16b
|
||||
shl T3.2d, T3.2d, #57
|
||||
ext T2.16b, VZR.16b, T3.16b, #8
|
||||
ext T3.16b, T3.16b, VZR.16b, #8
|
||||
eor DATA.16b, DATA.16b, T2.16b
|
||||
eor T1.16b, T1.16b, T3.16b
|
||||
|
||||
/* second phase of the reduction */
|
||||
ushr T2.2d, DATA.2d, #5
|
||||
eor T2.16b, T2.16b, DATA.16b
|
||||
ushr T2.2d, T2.2d, #1
|
||||
eor T2.16b, T2.16b, DATA.16b
|
||||
ushr T2.2d, T2.2d, #1
|
||||
ext T2.16b, XL.16b, XL.16b, #8
|
||||
ext IN1.16b, T1.16b, T1.16b, #8
|
||||
eor T1.16b, T1.16b, T2.16b
|
||||
eor DATA.16b, DATA.16b, T1.16b
|
||||
eor XL.16b, XL.16b, IN1.16b
|
||||
|
||||
pmull2 XH.1q, SHASH.2d, XL.2d // a1 * b1
|
||||
eor T1.16b, T1.16b, XL.16b
|
||||
pmull XL.1q, SHASH.1d, XL.1d // a0 * b0
|
||||
pmull XM.1q, SHASH2.1d, T1.1d // (a1 + a0)(b1 + b0)
|
||||
|
||||
ext T1.16b, XL.16b, XH.16b, #8
|
||||
eor T2.16b, XL.16b, XH.16b
|
||||
eor XM.16b, XM.16b, T1.16b
|
||||
eor XM.16b, XM.16b, T2.16b
|
||||
pmull T2.1q, XL.1d, MASK.1d
|
||||
|
||||
mov XH.d[0], XM.d[1]
|
||||
mov XM.d[1], XL.d[0]
|
||||
|
||||
eor XL.16b, XM.16b, T2.16b
|
||||
ext T2.16b, XL.16b, XL.16b, #8
|
||||
pmull XL.1q, XL.1d, MASK.1d
|
||||
eor T2.16b, T2.16b, XH.16b
|
||||
eor XL.16b, XL.16b, T2.16b
|
||||
|
||||
cbnz w0, 0b
|
||||
|
||||
st1 {DATA.16b}, [x1]
|
||||
st1 {XL.16b}, [x1]
|
||||
ret
|
||||
ENDPROC(pmull_ghash_update)
|
||||
|
|
|
|||
|
|
@ -67,11 +67,12 @@ static int ghash_update(struct shash_desc *desc, const u8 *src,
|
|||
blocks = len / GHASH_BLOCK_SIZE;
|
||||
len %= GHASH_BLOCK_SIZE;
|
||||
|
||||
kernel_neon_begin_partial(6);
|
||||
kernel_neon_begin_partial(8);
|
||||
pmull_ghash_update(blocks, ctx->digest, src, key,
|
||||
partial ? ctx->buf : NULL);
|
||||
kernel_neon_end();
|
||||
src += blocks * GHASH_BLOCK_SIZE;
|
||||
partial = 0;
|
||||
}
|
||||
if (len)
|
||||
memcpy(ctx->buf + partial, src, len);
|
||||
|
|
@ -88,7 +89,7 @@ static int ghash_final(struct shash_desc *desc, u8 *dst)
|
|||
|
||||
memset(ctx->buf + partial, 0, GHASH_BLOCK_SIZE - partial);
|
||||
|
||||
kernel_neon_begin_partial(6);
|
||||
kernel_neon_begin_partial(8);
|
||||
pmull_ghash_update(1, ctx->digest, ctx->buf, key, NULL);
|
||||
kernel_neon_end();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -30,7 +30,6 @@ generic-y += msgbuf.h
|
|||
generic-y += mutex.h
|
||||
generic-y += pci.h
|
||||
generic-y += poll.h
|
||||
generic-y += posix_types.h
|
||||
generic-y += preempt.h
|
||||
generic-y += resource.h
|
||||
generic-y += rwsem.h
|
||||
|
|
|
|||
|
|
@ -26,8 +26,6 @@
|
|||
#include <xen/xen.h>
|
||||
#include <asm/xen/hypervisor.h>
|
||||
|
||||
#define ARCH_HAS_DMA_GET_REQUIRED_MASK
|
||||
|
||||
#define DMA_ERROR_CODE (~(dma_addr_t)0)
|
||||
extern struct dma_map_ops *dma_ops;
|
||||
extern struct dma_map_ops coherent_swiotlb_dma_ops;
|
||||
|
|
|
|||
|
|
@ -246,7 +246,7 @@ static inline pmd_t pte_pmd(pte_t pte)
|
|||
#define pmd_mkwrite(pmd) pte_pmd(pte_mkwrite(pmd_pte(pmd)))
|
||||
#define pmd_mkdirty(pmd) pte_pmd(pte_mkdirty(pmd_pte(pmd)))
|
||||
#define pmd_mkyoung(pmd) pte_pmd(pte_mkyoung(pmd_pte(pmd)))
|
||||
#define pmd_mknotpresent(pmd) (__pmd(pmd_val(pmd) &= ~PMD_TYPE_MASK))
|
||||
#define pmd_mknotpresent(pmd) (__pmd(pmd_val(pmd) & ~PMD_TYPE_MASK))
|
||||
|
||||
#define __HAVE_ARCH_PMD_WRITE
|
||||
#define pmd_write(pmd) pte_write(pmd_pte(pmd))
|
||||
|
|
|
|||
10
arch/arm64/include/uapi/asm/posix_types.h
Normal file
10
arch/arm64/include/uapi/asm/posix_types.h
Normal file
|
|
@ -0,0 +1,10 @@
|
|||
#ifndef __ASM_POSIX_TYPES_H
|
||||
#define __ASM_POSIX_TYPES_H
|
||||
|
||||
typedef unsigned short __kernel_old_uid_t;
|
||||
typedef unsigned short __kernel_old_gid_t;
|
||||
#define __kernel_old_uid_t __kernel_old_uid_t
|
||||
|
||||
#include <asm-generic/posix_types.h>
|
||||
|
||||
#endif /* __ASM_POSIX_TYPES_H */
|
||||
|
|
@ -58,7 +58,7 @@ struct fpsimd_context {
|
|||
|
||||
struct esr_context {
|
||||
struct _aarch64_ctx head;
|
||||
u64 esr;
|
||||
__u64 esr;
|
||||
};
|
||||
|
||||
#endif /* _UAPI__ASM_SIGCONTEXT_H */
|
||||
|
|
|
|||
|
|
@ -205,7 +205,7 @@ ENDPROC(ftrace_graph_caller)
|
|||
*
|
||||
* Run ftrace_return_to_handler() before going back to parent.
|
||||
* @fp is checked against the value passed by ftrace_graph_caller()
|
||||
* only when CONFIG_FUNCTION_GRAPH_FP_TEST is enabled.
|
||||
* only when CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST is enabled.
|
||||
*/
|
||||
ENTRY(return_to_handler)
|
||||
str x0, [sp, #-16]!
|
||||
|
|
|
|||
|
|
@ -279,7 +279,6 @@ el1_sp_pc:
|
|||
*/
|
||||
mrs x0, far_el1
|
||||
enable_dbg
|
||||
mov x1, x25
|
||||
mov x2, sp
|
||||
b do_sp_pc_abort
|
||||
el1_undef:
|
||||
|
|
|
|||
|
|
@ -655,11 +655,16 @@ static int compat_gpr_get(struct task_struct *target,
|
|||
reg = task_pt_regs(target)->regs[idx];
|
||||
}
|
||||
|
||||
ret = copy_to_user(ubuf, ®, sizeof(reg));
|
||||
if (ret)
|
||||
break;
|
||||
if (kbuf) {
|
||||
memcpy(kbuf, ®, sizeof(reg));
|
||||
kbuf += sizeof(reg);
|
||||
} else {
|
||||
ret = copy_to_user(ubuf, ®, sizeof(reg));
|
||||
if (ret)
|
||||
break;
|
||||
|
||||
ubuf += sizeof(reg);
|
||||
ubuf += sizeof(reg);
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
|
@ -689,11 +694,16 @@ static int compat_gpr_set(struct task_struct *target,
|
|||
unsigned int idx = start + i;
|
||||
compat_ulong_t reg;
|
||||
|
||||
ret = copy_from_user(®, ubuf, sizeof(reg));
|
||||
if (ret)
|
||||
return ret;
|
||||
if (kbuf) {
|
||||
memcpy(®, kbuf, sizeof(reg));
|
||||
kbuf += sizeof(reg);
|
||||
} else {
|
||||
ret = copy_from_user(®, ubuf, sizeof(reg));
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ubuf += sizeof(reg);
|
||||
ubuf += sizeof(reg);
|
||||
}
|
||||
|
||||
switch (idx) {
|
||||
case 15:
|
||||
|
|
@ -827,6 +837,7 @@ static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
|
|||
compat_ulong_t val)
|
||||
{
|
||||
int ret;
|
||||
mm_segment_t old_fs = get_fs();
|
||||
|
||||
if (off & 3 || off >= COMPAT_USER_SZ)
|
||||
return -EIO;
|
||||
|
|
@ -834,10 +845,13 @@ static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
|
|||
if (off >= sizeof(compat_elf_gregset_t))
|
||||
return 0;
|
||||
|
||||
set_fs(KERNEL_DS);
|
||||
ret = copy_regset_from_user(tsk, &user_aarch32_view,
|
||||
REGSET_COMPAT_GPR, off,
|
||||
sizeof(compat_ulong_t),
|
||||
&val);
|
||||
set_fs(old_fs);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -71,7 +71,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
|
|||
/* 4GB maximum for 32-bit only capable devices */
|
||||
if (IS_ENABLED(CONFIG_ZONE_DMA)) {
|
||||
unsigned long max_dma_phys =
|
||||
(unsigned long)dma_to_phys(NULL, DMA_BIT_MASK(32) + 1);
|
||||
(unsigned long)(dma_to_phys(NULL, DMA_BIT_MASK(32)) + 1);
|
||||
max_dma = max(min, min(max, max_dma_phys >> PAGE_SHIFT));
|
||||
zone_size[ZONE_DMA] = max_dma - min;
|
||||
}
|
||||
|
|
@ -126,6 +126,8 @@ static void arm64_memory_present(void)
|
|||
|
||||
void __init arm64_memblock_init(void)
|
||||
{
|
||||
phys_addr_t dma_phys_limit = 0;
|
||||
|
||||
/* Register the kernel text, kernel data and initrd with memblock */
|
||||
memblock_reserve(__pa(_text), _end - _text);
|
||||
#ifdef CONFIG_BLK_DEV_INITRD
|
||||
|
|
@ -141,7 +143,11 @@ void __init arm64_memblock_init(void)
|
|||
memblock_reserve(__pa(idmap_pg_dir), IDMAP_DIR_SIZE);
|
||||
|
||||
early_init_fdt_scan_reserved_mem();
|
||||
dma_contiguous_reserve(0);
|
||||
|
||||
/* 4GB maximum for 32-bit only capable devices */
|
||||
if (IS_ENABLED(CONFIG_ZONE_DMA))
|
||||
dma_phys_limit = dma_to_phys(NULL, DMA_BIT_MASK(32)) + 1;
|
||||
dma_contiguous_reserve(dma_phys_limit);
|
||||
|
||||
memblock_allow_resize();
|
||||
memblock_dump_all();
|
||||
|
|
|
|||
|
|
@ -242,7 +242,7 @@ struct ioc {
|
|||
struct pci_dev *sac_only_dev;
|
||||
};
|
||||
|
||||
static struct ioc *ioc_list;
|
||||
static struct ioc *ioc_list, *ioc_found;
|
||||
static int reserve_sba_gart = 1;
|
||||
|
||||
static SBA_INLINE void sba_mark_invalid(struct ioc *, dma_addr_t, size_t);
|
||||
|
|
@ -1809,20 +1809,13 @@ static struct ioc_iommu ioc_iommu_info[] __initdata = {
|
|||
{ SX2000_IOC_ID, "sx2000", NULL },
|
||||
};
|
||||
|
||||
static struct ioc *
|
||||
ioc_init(unsigned long hpa, void *handle)
|
||||
static void ioc_init(unsigned long hpa, struct ioc *ioc)
|
||||
{
|
||||
struct ioc *ioc;
|
||||
struct ioc_iommu *info;
|
||||
|
||||
ioc = kzalloc(sizeof(*ioc), GFP_KERNEL);
|
||||
if (!ioc)
|
||||
return NULL;
|
||||
|
||||
ioc->next = ioc_list;
|
||||
ioc_list = ioc;
|
||||
|
||||
ioc->handle = handle;
|
||||
ioc->ioc_hpa = ioremap(hpa, 0x1000);
|
||||
|
||||
ioc->func_id = READ_REG(ioc->ioc_hpa + IOC_FUNC_ID);
|
||||
|
|
@ -1863,8 +1856,6 @@ ioc_init(unsigned long hpa, void *handle)
|
|||
"%s %d.%d HPA 0x%lx IOVA space %dMb at 0x%lx\n",
|
||||
ioc->name, (ioc->rev >> 4) & 0xF, ioc->rev & 0xF,
|
||||
hpa, ioc->iov_size >> 20, ioc->ibase);
|
||||
|
||||
return ioc;
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -2031,22 +2022,21 @@ sba_map_ioc_to_node(struct ioc *ioc, acpi_handle handle)
|
|||
#endif
|
||||
}
|
||||
|
||||
static int
|
||||
acpi_sba_ioc_add(struct acpi_device *device,
|
||||
const struct acpi_device_id *not_used)
|
||||
static void acpi_sba_ioc_add(struct ioc *ioc)
|
||||
{
|
||||
struct ioc *ioc;
|
||||
acpi_handle handle = ioc->handle;
|
||||
acpi_status status;
|
||||
u64 hpa, length;
|
||||
struct acpi_device_info *adi;
|
||||
|
||||
status = hp_acpi_csr_space(device->handle, &hpa, &length);
|
||||
ioc_found = ioc->next;
|
||||
status = hp_acpi_csr_space(handle, &hpa, &length);
|
||||
if (ACPI_FAILURE(status))
|
||||
return 1;
|
||||
goto err;
|
||||
|
||||
status = acpi_get_object_info(device->handle, &adi);
|
||||
status = acpi_get_object_info(handle, &adi);
|
||||
if (ACPI_FAILURE(status))
|
||||
return 1;
|
||||
goto err;
|
||||
|
||||
/*
|
||||
* For HWP0001, only SBA appears in ACPI namespace. It encloses the PCI
|
||||
|
|
@ -2067,13 +2057,13 @@ acpi_sba_ioc_add(struct acpi_device *device,
|
|||
if (!iovp_shift)
|
||||
iovp_shift = 12;
|
||||
|
||||
ioc = ioc_init(hpa, device->handle);
|
||||
if (!ioc)
|
||||
return 1;
|
||||
|
||||
ioc_init(hpa, ioc);
|
||||
/* setup NUMA node association */
|
||||
sba_map_ioc_to_node(ioc, device->handle);
|
||||
return 0;
|
||||
sba_map_ioc_to_node(ioc, handle);
|
||||
return;
|
||||
|
||||
err:
|
||||
kfree(ioc);
|
||||
}
|
||||
|
||||
static const struct acpi_device_id hp_ioc_iommu_device_ids[] = {
|
||||
|
|
@ -2081,9 +2071,26 @@ static const struct acpi_device_id hp_ioc_iommu_device_ids[] = {
|
|||
{"HWP0004", 0},
|
||||
{"", 0},
|
||||
};
|
||||
|
||||
static int acpi_sba_ioc_attach(struct acpi_device *device,
|
||||
const struct acpi_device_id *not_used)
|
||||
{
|
||||
struct ioc *ioc;
|
||||
|
||||
ioc = kzalloc(sizeof(*ioc), GFP_KERNEL);
|
||||
if (!ioc)
|
||||
return -ENOMEM;
|
||||
|
||||
ioc->next = ioc_found;
|
||||
ioc_found = ioc;
|
||||
ioc->handle = device->handle;
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
static struct acpi_scan_handler acpi_sba_ioc_handler = {
|
||||
.ids = hp_ioc_iommu_device_ids,
|
||||
.attach = acpi_sba_ioc_add,
|
||||
.attach = acpi_sba_ioc_attach,
|
||||
};
|
||||
|
||||
static int __init acpi_sba_ioc_init_acpi(void)
|
||||
|
|
@ -2118,9 +2125,12 @@ sba_init(void)
|
|||
#endif
|
||||
|
||||
/*
|
||||
* ioc_list should be populated by the acpi_sba_ioc_handler's .attach()
|
||||
* ioc_found should be populated by the acpi_sba_ioc_handler's .attach()
|
||||
* routine, but that only happens if acpi_scan_init() has already run.
|
||||
*/
|
||||
while (ioc_found)
|
||||
acpi_sba_ioc_add(ioc_found);
|
||||
|
||||
if (!ioc_list) {
|
||||
#ifdef CONFIG_IA64_GENERIC
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -45,7 +45,8 @@ CONFIG_SOLARIS_X86_PARTITION=y
|
|||
CONFIG_UNIXWARE_DISKLABEL=y
|
||||
CONFIG_CFQ_GROUP_IOSCHED=y
|
||||
CONFIG_DEFAULT_DEADLINE=y
|
||||
CONFIG_MARCH_Z9_109=y
|
||||
CONFIG_MARCH_Z196=y
|
||||
CONFIG_TUNE_ZEC12=y
|
||||
CONFIG_NR_CPUS=256
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_HZ_100=y
|
||||
|
|
@ -240,7 +241,6 @@ CONFIG_IP_VS_PE_SIP=m
|
|||
CONFIG_NF_CONNTRACK_IPV4=m
|
||||
# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set
|
||||
CONFIG_NF_TABLES_IPV4=m
|
||||
CONFIG_NFT_REJECT_IPV4=m
|
||||
CONFIG_NFT_CHAIN_ROUTE_IPV4=m
|
||||
CONFIG_NFT_CHAIN_NAT_IPV4=m
|
||||
CONFIG_NF_TABLES_ARP=m
|
||||
|
|
@ -456,6 +456,7 @@ CONFIG_TN3270_FS=y
|
|||
CONFIG_WATCHDOG=y
|
||||
CONFIG_WATCHDOG_NOWAYOUT=y
|
||||
CONFIG_SOFT_WATCHDOG=m
|
||||
CONFIG_DIAG288_WATCHDOG=m
|
||||
# CONFIG_HID is not set
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
CONFIG_INFINIBAND=m
|
||||
|
|
|
|||
|
|
@ -45,7 +45,8 @@ CONFIG_SOLARIS_X86_PARTITION=y
|
|||
CONFIG_UNIXWARE_DISKLABEL=y
|
||||
CONFIG_CFQ_GROUP_IOSCHED=y
|
||||
CONFIG_DEFAULT_DEADLINE=y
|
||||
CONFIG_MARCH_Z9_109=y
|
||||
CONFIG_MARCH_Z196=y
|
||||
CONFIG_TUNE_ZEC12=y
|
||||
CONFIG_NR_CPUS=256
|
||||
CONFIG_HZ_100=y
|
||||
CONFIG_MEMORY_HOTPLUG=y
|
||||
|
|
@ -238,7 +239,6 @@ CONFIG_IP_VS_PE_SIP=m
|
|||
CONFIG_NF_CONNTRACK_IPV4=m
|
||||
# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set
|
||||
CONFIG_NF_TABLES_IPV4=m
|
||||
CONFIG_NFT_REJECT_IPV4=m
|
||||
CONFIG_NFT_CHAIN_ROUTE_IPV4=m
|
||||
CONFIG_NFT_CHAIN_NAT_IPV4=m
|
||||
CONFIG_NF_TABLES_ARP=m
|
||||
|
|
@ -453,6 +453,7 @@ CONFIG_TN3270_FS=y
|
|||
CONFIG_WATCHDOG=y
|
||||
CONFIG_WATCHDOG_NOWAYOUT=y
|
||||
CONFIG_SOFT_WATCHDOG=m
|
||||
CONFIG_DIAG288_WATCHDOG=m
|
||||
# CONFIG_HID is not set
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
CONFIG_INFINIBAND=m
|
||||
|
|
|
|||
|
|
@ -43,7 +43,8 @@ CONFIG_SOLARIS_X86_PARTITION=y
|
|||
CONFIG_UNIXWARE_DISKLABEL=y
|
||||
CONFIG_CFQ_GROUP_IOSCHED=y
|
||||
CONFIG_DEFAULT_DEADLINE=y
|
||||
CONFIG_MARCH_Z9_109=y
|
||||
CONFIG_MARCH_Z196=y
|
||||
CONFIG_TUNE_ZEC12=y
|
||||
CONFIG_NR_CPUS=256
|
||||
CONFIG_HZ_100=y
|
||||
CONFIG_MEMORY_HOTPLUG=y
|
||||
|
|
@ -236,7 +237,6 @@ CONFIG_IP_VS_PE_SIP=m
|
|||
CONFIG_NF_CONNTRACK_IPV4=m
|
||||
# CONFIG_NF_CONNTRACK_PROC_COMPAT is not set
|
||||
CONFIG_NF_TABLES_IPV4=m
|
||||
CONFIG_NFT_REJECT_IPV4=m
|
||||
CONFIG_NFT_CHAIN_ROUTE_IPV4=m
|
||||
CONFIG_NFT_CHAIN_NAT_IPV4=m
|
||||
CONFIG_NF_TABLES_ARP=m
|
||||
|
|
@ -451,6 +451,7 @@ CONFIG_TN3270_FS=y
|
|||
CONFIG_WATCHDOG=y
|
||||
CONFIG_WATCHDOG_NOWAYOUT=y
|
||||
CONFIG_SOFT_WATCHDOG=m
|
||||
CONFIG_DIAG288_WATCHDOG=m
|
||||
# CONFIG_HID is not set
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
CONFIG_INFINIBAND=m
|
||||
|
|
|
|||
|
|
@ -8,7 +8,8 @@ CONFIG_CC_OPTIMIZE_FOR_SIZE=y
|
|||
CONFIG_PARTITION_ADVANCED=y
|
||||
CONFIG_IBM_PARTITION=y
|
||||
CONFIG_DEFAULT_DEADLINE=y
|
||||
CONFIG_MARCH_Z9_109=y
|
||||
CONFIG_MARCH_Z196=y
|
||||
CONFIG_TUNE_ZEC12=y
|
||||
# CONFIG_COMPAT is not set
|
||||
CONFIG_NR_CPUS=2
|
||||
# CONFIG_HOTPLUG_CPU is not set
|
||||
|
|
|
|||
|
|
@ -135,8 +135,8 @@ CONFIG_PROVE_LOCKING=y
|
|||
CONFIG_LOCK_STAT=y
|
||||
CONFIG_DEBUG_LOCKDEP=y
|
||||
CONFIG_DEBUG_ATOMIC_SLEEP=y
|
||||
CONFIG_DEBUG_WRITECOUNT=y
|
||||
CONFIG_DEBUG_LIST=y
|
||||
CONFIG_DEBUG_PI_LIST=y
|
||||
CONFIG_DEBUG_SG=y
|
||||
CONFIG_DEBUG_NOTIFIERS=y
|
||||
CONFIG_PROVE_RCU=y
|
||||
|
|
@ -199,4 +199,10 @@ CONFIG_CRYPTO_SHA512_S390=m
|
|||
CONFIG_CRYPTO_DES_S390=m
|
||||
CONFIG_CRYPTO_AES_S390=m
|
||||
CONFIG_CRC7=m
|
||||
# CONFIG_XZ_DEC_X86 is not set
|
||||
# CONFIG_XZ_DEC_POWERPC is not set
|
||||
# CONFIG_XZ_DEC_IA64 is not set
|
||||
# CONFIG_XZ_DEC_ARM is not set
|
||||
# CONFIG_XZ_DEC_ARMTHUMB is not set
|
||||
# CONFIG_XZ_DEC_SPARC is not set
|
||||
CONFIG_CMM=m
|
||||
|
|
|
|||
|
|
@ -33,10 +33,9 @@ static inline int init_new_context(struct task_struct *tsk,
|
|||
|
||||
static inline void set_user_asce(struct mm_struct *mm)
|
||||
{
|
||||
pgd_t *pgd = mm->pgd;
|
||||
|
||||
S390_lowcore.user_asce = mm->context.asce_bits | __pa(pgd);
|
||||
set_fs(current->thread.mm_segment);
|
||||
S390_lowcore.user_asce = mm->context.asce_bits | __pa(mm->pgd);
|
||||
if (current->thread.mm_segment.ar4)
|
||||
__ctl_load(S390_lowcore.user_asce, 7, 7);
|
||||
set_cpu_flag(CIF_ASCE);
|
||||
}
|
||||
|
||||
|
|
@ -70,12 +69,11 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
|
|||
/* Clear old ASCE by loading the kernel ASCE. */
|
||||
__ctl_load(S390_lowcore.kernel_asce, 1, 1);
|
||||
__ctl_load(S390_lowcore.kernel_asce, 7, 7);
|
||||
/* Delay loading of the new ASCE to control registers CR1 & CR7 */
|
||||
set_cpu_flag(CIF_ASCE);
|
||||
atomic_inc(&next->context.attach_count);
|
||||
atomic_dec(&prev->context.attach_count);
|
||||
if (MACHINE_HAS_TLB_LC)
|
||||
cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
|
||||
S390_lowcore.user_asce = next->context.asce_bits | __pa(next->pgd);
|
||||
}
|
||||
|
||||
#define finish_arch_post_lock_switch finish_arch_post_lock_switch
|
||||
|
|
@ -84,17 +82,18 @@ static inline void finish_arch_post_lock_switch(void)
|
|||
struct task_struct *tsk = current;
|
||||
struct mm_struct *mm = tsk->mm;
|
||||
|
||||
if (!mm)
|
||||
return;
|
||||
preempt_disable();
|
||||
while (atomic_read(&mm->context.attach_count) >> 16)
|
||||
cpu_relax();
|
||||
load_kernel_asce();
|
||||
if (mm) {
|
||||
preempt_disable();
|
||||
while (atomic_read(&mm->context.attach_count) >> 16)
|
||||
cpu_relax();
|
||||
|
||||
cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
|
||||
set_user_asce(mm);
|
||||
if (mm->context.flush_mm)
|
||||
__tlb_flush_mm(mm);
|
||||
preempt_enable();
|
||||
cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
|
||||
if (mm->context.flush_mm)
|
||||
__tlb_flush_mm(mm);
|
||||
preempt_enable();
|
||||
}
|
||||
set_fs(current->thread.mm_segment);
|
||||
}
|
||||
|
||||
#define enter_lazy_tlb(mm,tsk) do { } while (0)
|
||||
|
|
|
|||
|
|
@ -134,8 +134,4 @@ static inline void restore_access_regs(unsigned int *acrs)
|
|||
prev = __switch_to(prev,next); \
|
||||
} while (0)
|
||||
|
||||
#define finish_arch_switch(prev) do { \
|
||||
set_fs(current->thread.mm_segment); \
|
||||
} while (0)
|
||||
|
||||
#endif /* __ASM_SWITCH_TO_H */
|
||||
|
|
|
|||
|
|
@ -16,7 +16,9 @@ struct ucontext_extended {
|
|||
struct ucontext *uc_link;
|
||||
stack_t uc_stack;
|
||||
_sigregs uc_mcontext;
|
||||
unsigned long uc_sigmask[2];
|
||||
sigset_t uc_sigmask;
|
||||
/* Allow for uc_sigmask growth. Glibc uses a 1024-bit sigset_t. */
|
||||
unsigned char __unused[128 - sizeof(sigset_t)];
|
||||
unsigned long uc_gprs_high[16];
|
||||
};
|
||||
|
||||
|
|
@ -27,7 +29,9 @@ struct ucontext {
|
|||
struct ucontext *uc_link;
|
||||
stack_t uc_stack;
|
||||
_sigregs uc_mcontext;
|
||||
sigset_t uc_sigmask; /* mask last for extensibility */
|
||||
sigset_t uc_sigmask;
|
||||
/* Allow for uc_sigmask growth. Glibc uses a 1024-bit sigset_t. */
|
||||
unsigned char __unused[128 - sizeof(sigset_t)];
|
||||
};
|
||||
|
||||
#endif /* !_ASM_S390_UCONTEXT_H */
|
||||
|
|
|
|||
|
|
@ -69,7 +69,9 @@ struct ucontext32 {
|
|||
__u32 uc_link; /* pointer */
|
||||
compat_stack_t uc_stack;
|
||||
_sigregs32 uc_mcontext;
|
||||
compat_sigset_t uc_sigmask; /* mask last for extensibility */
|
||||
compat_sigset_t uc_sigmask;
|
||||
/* Allow for uc_sigmask growth. Glibc uses a 1024-bit sigset_t. */
|
||||
unsigned char __unused[128 - sizeof(compat_sigset_t)];
|
||||
};
|
||||
|
||||
struct stat64_emu31;
|
||||
|
|
|
|||
|
|
@ -124,7 +124,7 @@ extern void aes_sparc64_ctr_crypt_256(const u64 *key, const u64 *input,
|
|||
u64 *output, unsigned int len,
|
||||
u64 *iv);
|
||||
|
||||
struct aes_ops aes128_ops = {
|
||||
static struct aes_ops aes128_ops = {
|
||||
.encrypt = aes_sparc64_encrypt_128,
|
||||
.decrypt = aes_sparc64_decrypt_128,
|
||||
.load_encrypt_keys = aes_sparc64_load_encrypt_keys_128,
|
||||
|
|
@ -136,7 +136,7 @@ struct aes_ops aes128_ops = {
|
|||
.ctr_crypt = aes_sparc64_ctr_crypt_128,
|
||||
};
|
||||
|
||||
struct aes_ops aes192_ops = {
|
||||
static struct aes_ops aes192_ops = {
|
||||
.encrypt = aes_sparc64_encrypt_192,
|
||||
.decrypt = aes_sparc64_decrypt_192,
|
||||
.load_encrypt_keys = aes_sparc64_load_encrypt_keys_192,
|
||||
|
|
@ -148,7 +148,7 @@ struct aes_ops aes192_ops = {
|
|||
.ctr_crypt = aes_sparc64_ctr_crypt_192,
|
||||
};
|
||||
|
||||
struct aes_ops aes256_ops = {
|
||||
static struct aes_ops aes256_ops = {
|
||||
.encrypt = aes_sparc64_encrypt_256,
|
||||
.decrypt = aes_sparc64_decrypt_256,
|
||||
.load_encrypt_keys = aes_sparc64_load_encrypt_keys_256,
|
||||
|
|
|
|||
|
|
@ -20,11 +20,11 @@
|
|||
|
||||
#define ATOMIC_INIT(i) { (i) }
|
||||
|
||||
extern int __atomic_add_return(int, atomic_t *);
|
||||
extern int atomic_cmpxchg(atomic_t *, int, int);
|
||||
int __atomic_add_return(int, atomic_t *);
|
||||
int atomic_cmpxchg(atomic_t *, int, int);
|
||||
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
|
||||
extern int __atomic_add_unless(atomic_t *, int, int);
|
||||
extern void atomic_set(atomic_t *, int);
|
||||
int __atomic_add_unless(atomic_t *, int, int);
|
||||
void atomic_set(atomic_t *, int);
|
||||
|
||||
#define atomic_read(v) (*(volatile int *)&(v)->counter)
|
||||
|
||||
|
|
|
|||
|
|
@ -20,15 +20,15 @@
|
|||
#define atomic_set(v, i) (((v)->counter) = i)
|
||||
#define atomic64_set(v, i) (((v)->counter) = i)
|
||||
|
||||
extern void atomic_add(int, atomic_t *);
|
||||
extern void atomic64_add(long, atomic64_t *);
|
||||
extern void atomic_sub(int, atomic_t *);
|
||||
extern void atomic64_sub(long, atomic64_t *);
|
||||
void atomic_add(int, atomic_t *);
|
||||
void atomic64_add(long, atomic64_t *);
|
||||
void atomic_sub(int, atomic_t *);
|
||||
void atomic64_sub(long, atomic64_t *);
|
||||
|
||||
extern int atomic_add_ret(int, atomic_t *);
|
||||
extern long atomic64_add_ret(long, atomic64_t *);
|
||||
extern int atomic_sub_ret(int, atomic_t *);
|
||||
extern long atomic64_sub_ret(long, atomic64_t *);
|
||||
int atomic_add_ret(int, atomic_t *);
|
||||
long atomic64_add_ret(long, atomic64_t *);
|
||||
int atomic_sub_ret(int, atomic_t *);
|
||||
long atomic64_sub_ret(long, atomic64_t *);
|
||||
|
||||
#define atomic_dec_return(v) atomic_sub_ret(1, v)
|
||||
#define atomic64_dec_return(v) atomic64_sub_ret(1, v)
|
||||
|
|
@ -107,6 +107,6 @@ static inline long atomic64_add_unless(atomic64_t *v, long a, long u)
|
|||
|
||||
#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
|
||||
|
||||
extern long atomic64_dec_if_positive(atomic64_t *v);
|
||||
long atomic64_dec_if_positive(atomic64_t *v);
|
||||
|
||||
#endif /* !(__ARCH_SPARC64_ATOMIC__) */
|
||||
|
|
|
|||
|
|
@ -1,5 +1,12 @@
|
|||
#ifndef ___ASM_SPARC_AUXIO_H
|
||||
#define ___ASM_SPARC_AUXIO_H
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
extern void __iomem *auxio_register;
|
||||
|
||||
#endif /* ifndef __ASSEMBLY__ */
|
||||
|
||||
#if defined(__sparc__) && defined(__arch64__)
|
||||
#include <asm/auxio_64.h>
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -34,8 +34,8 @@
|
|||
* NOTE: these routines are implementation dependent--
|
||||
* understand the hardware you are querying!
|
||||
*/
|
||||
extern void set_auxio(unsigned char bits_on, unsigned char bits_off);
|
||||
extern unsigned char get_auxio(void); /* .../asm/floppy.h */
|
||||
void set_auxio(unsigned char bits_on, unsigned char bits_off);
|
||||
unsigned char get_auxio(void); /* .../asm/floppy.h */
|
||||
|
||||
/*
|
||||
* The following routines are provided for driver-compatibility
|
||||
|
|
@ -78,7 +78,7 @@ do { \
|
|||
|
||||
|
||||
/* AUXIO2 (Power Off Control) */
|
||||
extern __volatile__ unsigned char * auxio_power_register;
|
||||
extern volatile u8 __iomem *auxio_power_register;
|
||||
|
||||
#define AUXIO_POWER_DETECT_FAILURE 32
|
||||
#define AUXIO_POWER_CLEAR_FAILURE 2
|
||||
|
|
|
|||
|
|
@ -75,8 +75,6 @@
|
|||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
extern void __iomem *auxio_register;
|
||||
|
||||
#define AUXIO_LTE_ON 1
|
||||
#define AUXIO_LTE_OFF 0
|
||||
|
||||
|
|
@ -84,7 +82,7 @@ extern void __iomem *auxio_register;
|
|||
*
|
||||
* on - AUXIO_LTE_ON or AUXIO_LTE_OFF
|
||||
*/
|
||||
extern void auxio_set_lte(int on);
|
||||
void auxio_set_lte(int on);
|
||||
|
||||
#define AUXIO_LED_ON 1
|
||||
#define AUXIO_LED_OFF 0
|
||||
|
|
@ -93,7 +91,7 @@ extern void auxio_set_lte(int on);
|
|||
*
|
||||
* on - AUXIO_LED_ON or AUXIO_LED_OFF
|
||||
*/
|
||||
extern void auxio_set_led(int on);
|
||||
void auxio_set_led(int on);
|
||||
|
||||
#endif /* ifndef __ASSEMBLY__ */
|
||||
|
||||
|
|
|
|||
|
|
@ -20,8 +20,8 @@ struct bit_map {
|
|||
int num_colors;
|
||||
};
|
||||
|
||||
extern int bit_map_string_get(struct bit_map *t, int len, int align);
|
||||
extern void bit_map_clear(struct bit_map *t, int offset, int len);
|
||||
extern void bit_map_init(struct bit_map *t, unsigned long *map, int size);
|
||||
int bit_map_string_get(struct bit_map *t, int len, int align);
|
||||
void bit_map_clear(struct bit_map *t, int offset, int len);
|
||||
void bit_map_init(struct bit_map *t, unsigned long *map, int size);
|
||||
|
||||
#endif /* defined(_SPARC_BITEXT_H) */
|
||||
|
|
|
|||
|
|
@ -18,9 +18,9 @@
|
|||
#error only <linux/bitops.h> can be included directly
|
||||
#endif
|
||||
|
||||
extern unsigned long ___set_bit(unsigned long *addr, unsigned long mask);
|
||||
extern unsigned long ___clear_bit(unsigned long *addr, unsigned long mask);
|
||||
extern unsigned long ___change_bit(unsigned long *addr, unsigned long mask);
|
||||
unsigned long ___set_bit(unsigned long *addr, unsigned long mask);
|
||||
unsigned long ___clear_bit(unsigned long *addr, unsigned long mask);
|
||||
unsigned long ___change_bit(unsigned long *addr, unsigned long mask);
|
||||
|
||||
/*
|
||||
* Set bit 'nr' in 32-bit quantity at address 'addr' where bit '0'
|
||||
|
|
|
|||
|
|
@ -15,12 +15,12 @@
|
|||
#include <asm/byteorder.h>
|
||||
#include <asm/barrier.h>
|
||||
|
||||
extern int test_and_set_bit(unsigned long nr, volatile unsigned long *addr);
|
||||
extern int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr);
|
||||
extern int test_and_change_bit(unsigned long nr, volatile unsigned long *addr);
|
||||
extern void set_bit(unsigned long nr, volatile unsigned long *addr);
|
||||
extern void clear_bit(unsigned long nr, volatile unsigned long *addr);
|
||||
extern void change_bit(unsigned long nr, volatile unsigned long *addr);
|
||||
int test_and_set_bit(unsigned long nr, volatile unsigned long *addr);
|
||||
int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr);
|
||||
int test_and_change_bit(unsigned long nr, volatile unsigned long *addr);
|
||||
void set_bit(unsigned long nr, volatile unsigned long *addr);
|
||||
void clear_bit(unsigned long nr, volatile unsigned long *addr);
|
||||
void change_bit(unsigned long nr, volatile unsigned long *addr);
|
||||
|
||||
#include <asm-generic/bitops/non-atomic.h>
|
||||
|
||||
|
|
@ -30,8 +30,8 @@ extern void change_bit(unsigned long nr, volatile unsigned long *addr);
|
|||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
extern int ffs(int x);
|
||||
extern unsigned long __ffs(unsigned long);
|
||||
int ffs(int x);
|
||||
unsigned long __ffs(unsigned long);
|
||||
|
||||
#include <asm-generic/bitops/ffz.h>
|
||||
#include <asm-generic/bitops/sched.h>
|
||||
|
|
@ -41,10 +41,10 @@ extern unsigned long __ffs(unsigned long);
|
|||
* of bits set) of a N-bit word
|
||||
*/
|
||||
|
||||
extern unsigned long __arch_hweight64(__u64 w);
|
||||
extern unsigned int __arch_hweight32(unsigned int w);
|
||||
extern unsigned int __arch_hweight16(unsigned int w);
|
||||
extern unsigned int __arch_hweight8(unsigned int w);
|
||||
unsigned long __arch_hweight64(__u64 w);
|
||||
unsigned int __arch_hweight32(unsigned int w);
|
||||
unsigned int __arch_hweight16(unsigned int w);
|
||||
unsigned int __arch_hweight8(unsigned int w);
|
||||
|
||||
#include <asm-generic/bitops/const_hweight.h>
|
||||
#include <asm-generic/bitops/lock.h>
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user