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- Add a bunch of PCI IDs for new AMD CPUs and use them in k10temp
- Free the pmem platform device on the registration error path -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmLnuOIACgkQEsHwGGHe VUrY0Q/+JPlcOVTbneHaUazeG7i0EYugNLslPa42FzcM8B0NMnK241XjP8fubZML cHh76LWWu7MjUdkpiXjiQoBwp9fJHF1amkUNJ2JBJ3Vcz8phvfnCeaiotMeKIrDZ XsG7+UuQcUAL5C5C9UOJYWHAA32IlcuvaKA0xV76TF3qMo6vmI62AYdc8ddcQj7k qvtdzwVwoJ1RAJ1jD54c5nHZHu1yuPAx9unYsGnE7v6X8geU9aZ6EsNsLO/vAmt7 0qmIuUYmR12QL3PwfAlOqIev/yIOjcac/sA3zEDOwOjZt4fS77d8GLG3mnj9x4GY 9v9n0d2ZJd8iDb6g27mzZTqzqTTcm60TckiW+asdlc+tWi+bLH6btpdmZ5RZD9M1 GgsbEXsXpnG33rMucLiGKWPseFhKty7jWH51ux0KWygHajFSRqZHyPL8LNSmohZJ X45wvRKB5VuTbITHZ+Ix7mTna34IFYu1TiLT+Bd0oGFS4WUfee5vb7JDpIOXfV3W 0Fi7xM7JCJQnvj1K5ernx0W37t35AfWahPKLPMtZu0EFodXxyHDfGG0yWeV9THD4 zkrZTYudZbtUNLO1vep/ikPnFCJ/EhntVNhk4J2MvSZ2xdUMbyFpd8h3kVR+UL0r aprdPGwhWEDmjycO41sp+ifC/t1e5QBxTilp5WzUzoVEH05rIUk= =IY+U -----END PGP SIGNATURE----- Merge tag 'x86_misc_for_v6.0_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull misc x86 updates from Borislav Petkov: - Add a bunch of PCI IDs for new AMD CPUs and use them in k10temp - Free the pmem platform device on the registration error path * tag 'x86_misc_for_v6.0_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: hwmon: (k10temp): Add support for new family 17h and 19h models x86/amd_nb: Add AMD PCI IDs for SMN communication x86/pmem: Fix platform-device leak in error path
This commit is contained in:
Linus Torvalds
commit
98b1783de2
@ -19,17 +19,23 @@
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#define PCI_DEVICE_ID_AMD_17H_M10H_ROOT 0x15d0
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#define PCI_DEVICE_ID_AMD_17H_M30H_ROOT 0x1480
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#define PCI_DEVICE_ID_AMD_17H_M60H_ROOT 0x1630
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#define PCI_DEVICE_ID_AMD_17H_MA0H_ROOT 0x14b5
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#define PCI_DEVICE_ID_AMD_19H_M10H_ROOT 0x14a4
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#define PCI_DEVICE_ID_AMD_19H_M60H_ROOT 0x14d8
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#define PCI_DEVICE_ID_AMD_19H_M70H_ROOT 0x14e8
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#define PCI_DEVICE_ID_AMD_17H_DF_F4 0x1464
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#define PCI_DEVICE_ID_AMD_17H_M10H_DF_F4 0x15ec
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#define PCI_DEVICE_ID_AMD_17H_M30H_DF_F4 0x1494
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#define PCI_DEVICE_ID_AMD_17H_M60H_DF_F4 0x144c
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#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F4 0x1444
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#define PCI_DEVICE_ID_AMD_17H_MA0H_DF_F4 0x1728
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#define PCI_DEVICE_ID_AMD_19H_DF_F4 0x1654
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#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F4 0x14b1
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#define PCI_DEVICE_ID_AMD_19H_M40H_ROOT 0x14b5
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#define PCI_DEVICE_ID_AMD_19H_M40H_DF_F4 0x167d
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#define PCI_DEVICE_ID_AMD_19H_M50H_DF_F4 0x166e
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#define PCI_DEVICE_ID_AMD_19H_M60H_DF_F4 0x14e4
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#define PCI_DEVICE_ID_AMD_19H_M70H_DF_F4 0x14f4
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/* Protect the PCI config register pairs used for SMN. */
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static DEFINE_MUTEX(smn_mutex);
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@ -41,8 +47,11 @@ static const struct pci_device_id amd_root_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_ROOT) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_ROOT) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_ROOT) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_ROOT) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_ROOT) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_ROOT) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M60H_ROOT) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M70H_ROOT) },
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{}
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};
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@ -61,12 +70,15 @@ static const struct pci_device_id amd_nb_misc_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M10H_DF_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_DF_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_DF_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CNB17H_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_DF_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M60H_DF_F3) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M70H_DF_F3) },
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{}
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};
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@ -81,6 +93,7 @@ static const struct pci_device_id amd_nb_link_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M60H_DF_F4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_17H_MA0H_DF_F4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_DF_F4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F4) },
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F4) },
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@ -27,6 +27,11 @@ static __init int register_e820_pmem(void)
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* simply here to trigger the module to load on demand.
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*/
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pdev = platform_device_alloc("e820_pmem", -1);
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return platform_device_add(pdev);
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rc = platform_device_add(pdev);
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if (rc)
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platform_device_put(pdev);
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return rc;
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}
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device_initcall(register_e820_pmem);
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@ -428,6 +428,10 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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data->ccd_offset = 0x154;
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k10temp_get_ccd_support(pdev, data, 8);
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break;
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case 0xa0 ... 0xaf:
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data->ccd_offset = 0x300;
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k10temp_get_ccd_support(pdev, data, 8);
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break;
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}
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} else if (boot_cpu_data.x86 == 0x19) {
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data->temp_adjust_mask = ZEN_CUR_TEMP_RANGE_SEL_MASK;
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@ -445,6 +449,11 @@ static int k10temp_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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data->ccd_offset = 0x300;
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k10temp_get_ccd_support(pdev, data, 8);
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break;
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case 0x60 ... 0x6f:
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case 0x70 ... 0x7f:
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data->ccd_offset = 0x308;
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k10temp_get_ccd_support(pdev, data, 8);
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break;
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case 0x10 ... 0x1f:
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case 0xa0 ... 0xaf:
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data->ccd_offset = 0x300;
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@ -489,10 +498,13 @@ static const struct pci_device_id k10temp_id_table[] = {
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M30H_DF_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M60H_DF_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_M70H_DF_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_17H_MA0H_DF_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_DF_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M10H_DF_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M40H_DF_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M50H_DF_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M60H_DF_F3) },
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{ PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_19H_M70H_DF_F3) },
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{ PCI_VDEVICE(HYGON, PCI_DEVICE_ID_AMD_17H_DF_F3) },
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{}
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};
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@ -556,10 +556,13 @@
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#define PCI_DEVICE_ID_AMD_17H_M30H_DF_F3 0x1493
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#define PCI_DEVICE_ID_AMD_17H_M60H_DF_F3 0x144b
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#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F3 0x1443
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#define PCI_DEVICE_ID_AMD_17H_MA0H_DF_F3 0x1727
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#define PCI_DEVICE_ID_AMD_19H_DF_F3 0x1653
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#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F3 0x14b0
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#define PCI_DEVICE_ID_AMD_19H_M40H_DF_F3 0x167c
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#define PCI_DEVICE_ID_AMD_19H_M50H_DF_F3 0x166d
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#define PCI_DEVICE_ID_AMD_19H_M60H_DF_F3 0x14e3
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#define PCI_DEVICE_ID_AMD_19H_M70H_DF_F3 0x14f3
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#define PCI_DEVICE_ID_AMD_CNB17H_F3 0x1703
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#define PCI_DEVICE_ID_AMD_LANCE 0x2000
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#define PCI_DEVICE_ID_AMD_LANCE_HOME 0x2001
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