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drm/exynos/mixer: fix interrupt clearing
The driver used incorrect flags to clear interrupt status. The patch fixes it. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Reviewed-by: Joonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com>
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@ -718,6 +718,10 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg)
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/* handling VSYNC */
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/* handling VSYNC */
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if (val & MXR_INT_STATUS_VSYNC) {
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if (val & MXR_INT_STATUS_VSYNC) {
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/* vsync interrupt use different bit for read and clear */
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val |= MXR_INT_CLEAR_VSYNC;
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val &= ~MXR_INT_STATUS_VSYNC;
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/* interlace scan need to check shadow register */
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/* interlace scan need to check shadow register */
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if (ctx->interlace) {
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if (ctx->interlace) {
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base = mixer_reg_read(res, MXR_GRAPHIC_BASE(0));
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base = mixer_reg_read(res, MXR_GRAPHIC_BASE(0));
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@ -743,11 +747,6 @@ static irqreturn_t mixer_irq_handler(int irq, void *arg)
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out:
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out:
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/* clear interrupts */
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/* clear interrupts */
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if (~val & MXR_INT_EN_VSYNC) {
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/* vsync interrupt use different bit for read and clear */
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val &= ~MXR_INT_EN_VSYNC;
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val |= MXR_INT_CLEAR_VSYNC;
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}
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mixer_reg_write(res, MXR_INT_STATUS, val);
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mixer_reg_write(res, MXR_INT_STATUS, val);
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spin_unlock(&res->reg_slock);
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spin_unlock(&res->reg_slock);
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