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drm/mgag200: fix G200ER pll picking algorithm
The original code was misported from the X driver, a) an int went to unsigned int, breaking the downward counting testm code b) the port did the vco/computed clock bits completely wrong. This fixes an infinite loop on modprobe on some Dell servers with the G200ER chipset variant. Found in internal testing. Cc: stable@vger.kernel.org Signed-off-by: Dave Airlie <airlied@redhat.com>
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@ -468,10 +468,11 @@ static int mga_g200er_set_plls(struct mga_device *mdev, long clock)
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{
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unsigned int vcomax, vcomin, pllreffreq;
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unsigned int delta, tmpdelta;
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unsigned int testr, testn, testm, testo;
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int testr, testn, testm, testo;
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unsigned int p, m, n;
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unsigned int computed;
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unsigned int computed, vco;
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int tmp;
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const unsigned int m_div_val[] = { 1, 2, 4, 8 };
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m = n = p = 0;
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vcomax = 1488000;
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@ -490,12 +491,13 @@ static int mga_g200er_set_plls(struct mga_device *mdev, long clock)
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if (delta == 0)
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break;
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for (testo = 5; testo < 33; testo++) {
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computed = pllreffreq * (testn + 1) /
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vco = pllreffreq * (testn + 1) /
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(testr + 1);
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if (computed < vcomin)
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if (vco < vcomin)
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continue;
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if (computed > vcomax)
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if (vco > vcomax)
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continue;
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computed = vco / (m_div_val[testm] * (testo + 1));
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if (computed > clock)
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tmpdelta = computed - clock;
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else
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