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cxgb4: Simplify PCIe Completion Timeout setting

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Simplify PCIe Completion Timeout setting by using the
pcie_capability_clear_and_set_word() interface.  No functional change
intended.

Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Bjorn Helgaas 2017-12-15 17:01:50 -06:00 committed by David S. Miller
parent 0dc6905a6a
commit 962b582785
1 changed files with 3 additions and 18 deletions
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21
drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
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@ -8498,22 +8498,6 @@ found:
return 0;
}
static void set_pcie_completion_timeout(struct adapter *adapter, u8 range)
{
u16 val;
u32 pcie_cap;
pcie_cap = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
if (pcie_cap) {
pci_read_config_word(adapter->pdev,
pcie_cap + PCI_EXP_DEVCTL2, &val);
val &= ~PCI_EXP_DEVCTL2_COMP_TIMEOUT;
val |= range;
pci_write_config_word(adapter->pdev,
pcie_cap + PCI_EXP_DEVCTL2, val);
}
}
/**
* t4_prep_adapter - prepare SW and HW for operation
* @adapter: the adapter
@ -8599,8 +8583,9 @@ int t4_prep_adapter(struct adapter *adapter)
adapter->params.portvec = 1;
adapter->params.vpd.cclk = 50000;
/* Set pci completion timeout value to 4 seconds. */
set_pcie_completion_timeout(adapter, 0xd);
/* Set PCIe completion timeout to 4 seconds. */
pcie_capability_clear_and_set_word(adapter->pdev, PCI_EXP_DEVCTL2,
PCI_EXP_DEVCTL2_COMP_TIMEOUT, 0xd);
return 0;
}