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MIPS: Loongson 2: Sort out clock managment.
For unexplainable reasons the Loongson 2 clock API was implemented in a module so fixing this involved shifting large amounts of code around. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -50,15 +50,4 @@ void clk_recalc_rate(struct clk *);
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int clk_register(struct clk *);
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int clk_register(struct clk *);
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void clk_unregister(struct clk *);
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void clk_unregister(struct clk *);
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/* the exported API, in addition to clk_set_rate */
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/**
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* clk_set_rate_ex - set the clock rate for a clock source, with additional parameter
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* @clk: clock source
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* @rate: desired clock rate in Hz
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* @algo_id: algorithm id to be passed down to ops->set_rate
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*
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* Returns success (0) or negative errno.
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*/
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int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);
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#endif /* __ASM_MIPS_CLOCK_H */
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#endif /* __ASM_MIPS_CLOCK_H */
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@ -245,7 +245,6 @@ static inline void do_perfcnt_IRQ(void)
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#ifdef CONFIG_CPU_SUPPORTS_CPUFREQ
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#ifdef CONFIG_CPU_SUPPORTS_CPUFREQ
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#include <linux/cpufreq.h>
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#include <linux/cpufreq.h>
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extern void loongson2_cpu_wait(void);
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extern struct cpufreq_frequency_table loongson2_clockmod_table[];
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extern struct cpufreq_frequency_table loongson2_clockmod_table[];
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/* Chip Config */
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/* Chip Config */
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@ -2,4 +2,4 @@
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# Makefile for the Linux/MIPS cpufreq.
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# Makefile for the Linux/MIPS cpufreq.
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#
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#
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obj-$(CONFIG_LOONGSON2_CPUFREQ) += loongson2_cpufreq.o loongson2_clock.o
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obj-$(CONFIG_LOONGSON2_CPUFREQ) += loongson2_cpufreq.o
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@ -19,7 +19,7 @@
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#include <asm/clock.h>
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#include <asm/clock.h>
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#include <loongson.h>
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#include <asm/mach-loongson/loongson.h>
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static uint nowait;
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static uint nowait;
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@ -181,6 +181,25 @@ static struct platform_driver platform_driver = {
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.id_table = platform_device_ids,
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.id_table = platform_device_ids,
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};
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};
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/*
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* This is the simple version of Loongson-2 wait, Maybe we need do this in
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* interrupt disabled context.
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*/
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static DEFINE_SPINLOCK(loongson2_wait_lock);
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static void loongson2_cpu_wait(void)
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{
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unsigned long flags;
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u32 cpu_freq;
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spin_lock_irqsave(&loongson2_wait_lock, flags);
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cpu_freq = LOONGSON_CHIPCFG0;
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LOONGSON_CHIPCFG0 &= ~0x7; /* Put CPU into wait mode */
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LOONGSON_CHIPCFG0 = cpu_freq; /* Restore CPU state */
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spin_unlock_irqrestore(&loongson2_wait_lock, flags);
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}
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static int __init cpufreq_init(void)
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static int __init cpufreq_init(void)
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{
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{
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int ret;
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int ret;
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@ -41,6 +41,7 @@ config LEMOTE_MACH2F
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select CSRC_R4K if ! MIPS_EXTERNAL_TIMER
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select CSRC_R4K if ! MIPS_EXTERNAL_TIMER
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select DMA_NONCOHERENT
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select DMA_NONCOHERENT
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select GENERIC_ISA_DMA_SUPPORT_BROKEN
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select GENERIC_ISA_DMA_SUPPORT_BROKEN
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select HAVE_CLK
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select HW_HAS_PCI
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select HW_HAS_PCI
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select I8259
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select I8259
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select IRQ_CPU
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select IRQ_CPU
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@ -2,7 +2,7 @@
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# Makefile for lemote loongson2f family machines
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# Makefile for lemote loongson2f family machines
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#
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#
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obj-y += machtype.o irq.o reset.o ec_kb3310b.o
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obj-y += clock.o machtype.o irq.o reset.o ec_kb3310b.o
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#
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#
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# Suspend Support
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# Suspend Support
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@ -6,14 +6,17 @@
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* License. See the file "COPYING" in the main directory of this archive
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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* for more details.
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*/
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*/
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#include <linux/clk.h>
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#include <linux/module.h>
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#include <linux/cpufreq.h>
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#include <linux/cpufreq.h>
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#include <linux/platform_device.h>
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#include <linux/errno.h>
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#include <linux/export.h>
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#include <linux/init.h>
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#include <linux/list.h>
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#include <linux/mutex.h>
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#include <linux/spinlock.h>
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#include <asm/clock.h>
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#include <asm/clock.h>
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#include <asm/mach-loongson/loongson.h>
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#include <loongson.h>
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static LIST_HEAD(clock_list);
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static LIST_HEAD(clock_list);
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static DEFINE_SPINLOCK(clock_lock);
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static DEFINE_SPINLOCK(clock_lock);
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@ -88,12 +91,6 @@ void clk_put(struct clk *clk)
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EXPORT_SYMBOL(clk_put);
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EXPORT_SYMBOL(clk_put);
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int clk_set_rate(struct clk *clk, unsigned long rate)
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int clk_set_rate(struct clk *clk, unsigned long rate)
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{
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return clk_set_rate_ex(clk, rate, 0);
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}
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EXPORT_SYMBOL_GPL(clk_set_rate);
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int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
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{
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{
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int ret = 0;
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int ret = 0;
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int regval;
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int regval;
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@ -103,7 +100,7 @@ int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
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unsigned long flags;
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unsigned long flags;
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spin_lock_irqsave(&clock_lock, flags);
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spin_lock_irqsave(&clock_lock, flags);
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ret = clk->ops->set_rate(clk, rate, algo_id);
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ret = clk->ops->set_rate(clk, rate, 0);
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spin_unlock_irqrestore(&clock_lock, flags);
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spin_unlock_irqrestore(&clock_lock, flags);
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}
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}
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@ -129,7 +126,7 @@ int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)
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return ret;
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return ret;
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}
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}
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EXPORT_SYMBOL_GPL(clk_set_rate_ex);
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EXPORT_SYMBOL_GPL(clk_set_rate);
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long clk_round_rate(struct clk *clk, unsigned long rate)
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long clk_round_rate(struct clk *clk, unsigned long rate)
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{
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{
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@ -146,26 +143,3 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
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return rate;
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return rate;
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}
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}
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EXPORT_SYMBOL_GPL(clk_round_rate);
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EXPORT_SYMBOL_GPL(clk_round_rate);
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/*
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* This is the simple version of Loongson-2 wait, Maybe we need do this in
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* interrupt disabled content
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*/
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DEFINE_SPINLOCK(loongson2_wait_lock);
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void loongson2_cpu_wait(void)
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{
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u32 cpu_freq;
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unsigned long flags;
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spin_lock_irqsave(&loongson2_wait_lock, flags);
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cpu_freq = LOONGSON_CHIPCFG0;
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LOONGSON_CHIPCFG0 &= ~0x7; /* Put CPU into wait mode */
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LOONGSON_CHIPCFG0 = cpu_freq; /* Restore CPU state */
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spin_unlock_irqrestore(&loongson2_wait_lock, flags);
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}
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EXPORT_SYMBOL_GPL(loongson2_cpu_wait);
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MODULE_AUTHOR("Yanhua <yanh@lemote.com>");
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MODULE_DESCRIPTION("cpufreq driver for Loongson 2F");
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MODULE_LICENSE("GPL");
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