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pinctrl: mvebu: armada-{375,38x,39x}: normalize naming of PTP subnames
The subnames are purely informative, but it's nicer when they match accross SoCs. This commit adjusts the Armada 375, Armada 38x and Armada 39x MPP definitions so that the subnames of the PTP pins match the ones used on Armada XP and Kirkwood. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -15,8 +15,8 @@ name pins functions
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================================================================================
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mpp0 0 gpio, dev(ad2), spi0(cs1), spi1(cs1)
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mpp1 1 gpio, dev(ad3), spi0(mosi), spi1(mosi)
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mpp2 2 gpio, dev(ad4), ptp(eventreq), led(c0), audio(sdi)
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mpp3 3 gpio, dev(ad5), ptp(triggen), led(p3), audio(mclk)
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mpp2 2 gpio, dev(ad4), ptp(evreq), led(c0), audio(sdi)
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mpp3 3 gpio, dev(ad5), ptp(trig), led(p3), audio(mclk)
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mpp4 4 gpio, dev(ad6), spi0(miso), spi1(miso)
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mpp5 5 gpio, dev(ad7), spi0(cs2), spi1(cs2)
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mpp6 6 gpio, dev(ad0), led(p1), audio(rclk)
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@ -45,7 +45,7 @@ mpp28 28 gpio, led(p3), ge1(txctl), sd(clk)
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mpp29 29 gpio, pcie1(clkreq), ge1(rxclk), sd(d3)
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mpp30 30 gpio, ge1(txd0), spi1(cs0)
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mpp31 31 gpio, ge1(txd1), spi1(mosi)
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mpp32 32 gpio, ge1(txd2), spi1(sck), ptp(triggen)
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mpp32 32 gpio, ge1(txd2), spi1(sck), ptp(trig)
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mpp33 33 gpio, ge1(txd3), spi1(miso)
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mpp34 34 gpio, ge1(txclkout), spi1(sck)
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mpp35 35 gpio, ge1(rxctl), spi1(cs1), spi0(cs2)
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@ -76,7 +76,7 @@ mpp59 59 gpio, led(c1)
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mpp60 60 gpio, uart1(txd), led(c2)
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mpp61 61 gpio, i2c1(sda), uart1(rxd), spi1(cs2), led(p0)
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mpp62 62 gpio, i2c1(sck), led(p1)
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mpp63 63 gpio, ptp(triggen), led(p2)
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mpp63 63 gpio, ptp(trig), led(p2)
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mpp64 64 gpio, dram(vttctrl), led(p3)
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mpp65 65 gpio, sata1(prsnt)
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mpp66 66 gpio, ptp(eventreq), spi1(cs3)
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mpp66 66 gpio, ptp(evreq), spi1(cs3)
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@ -33,8 +33,8 @@ mpp14 14 gpio, ge0(rxd2), ptp(clk), m(vtt_ctrl), spi0(cs3), dev(we
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mpp15 15 gpio, ge0(rxd3), ge(mdc slave), pcie0(rstout), spi0(mosi)
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mpp16 16 gpio, ge0(rxctl), ge(mdio slave), m(decc_err), spi0(miso), pcie0(clkreq), pcie1(clkreq) [1]
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mpp17 17 gpio, ge0(rxclk), ptp(clk), ua1(rxd), spi0(sck), sata1(prsnt)
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mpp18 18 gpio, ge0(rxerr), ptp(trig_gen), ua1(txd), spi0(cs0)
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mpp19 19 gpio, ge0(col), ptp(event_req), ge0(txerr), sata1(prsnt), ua0(cts)
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mpp18 18 gpio, ge0(rxerr), ptp(trig), ua1(txd), spi0(cs0)
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mpp19 19 gpio, ge0(col), ptp(evreq), ge0(txerr), sata1(prsnt), ua0(cts)
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mpp20 20 gpio, ge0(txclk), ptp(clk), sata0(prsnt), ua0(rts)
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mpp21 21 gpio, spi0(cs1), ge1(rxd0), sata0(prsnt), sd0(cmd), dev(bootcs)
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mpp22 22 gpio, spi0(mosi), dev(ad0)
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@ -51,9 +51,9 @@ mpp32 32 gpio, ge1(txctl), dev(wen0)
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mpp33 33 gpio, m(decc_err), dev(ad3)
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mpp34 34 gpio, dev(ad1)
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mpp35 35 gpio, ref(clk_out1), dev(a1)
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mpp36 36 gpio, ptp(trig_gen), dev(a0)
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mpp36 36 gpio, ptp(trig), dev(a0)
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mpp37 37 gpio, ptp(clk), ge1(rxclk), sd0(d3), dev(ad8)
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mpp38 38 gpio, ptp(event_req), ge1(rxd1), ref(clk_out0), sd0(d0), dev(ad4)
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mpp38 38 gpio, ptp(evreq), ge1(rxd1), ref(clk_out0), sd0(d0), dev(ad4)
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mpp39 39 gpio, i2c1(sck), ge1(rxd2), ua0(cts), sd0(d1), dev(a2)
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mpp40 40 gpio, i2c1(sda), ge1(rxd3), ua0(rts), sd0(d2), dev(ad6)
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mpp41 41 gpio, ua1(rxd), ge1(rxctl), ua0(cts), spi1(cs3), dev(burst/last)
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@ -24,7 +24,7 @@ mpp6 6 gpio, dev(cs3), xsmi(mdio)
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mpp7 7 gpio, dev(ad9), xsmi(mdc)
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mpp8 8 gpio, dev(ad10), ptp(trig)
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mpp9 9 gpio, dev(ad11), ptp(clk)
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mpp10 10 gpio, dev(ad12), ptp(event)
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mpp10 10 gpio, dev(ad12), ptp(evreq)
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mpp11 11 gpio, dev(ad13), led(clk)
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mpp12 12 gpio, pcie0(rstout), dev(ad14), led(stb)
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mpp13 13 gpio, dev(ad15), led(data)
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@ -51,7 +51,7 @@ static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = {
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MPP_MODE(2,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad4"),
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MPP_FUNCTION(0x2, "ptp", "eventreq"),
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MPP_FUNCTION(0x2, "ptp", "evreq"),
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MPP_FUNCTION(0x3, "led", "c0"),
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MPP_FUNCTION(0x4, "audio", "sdi"),
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MPP_FUNCTION(0x5, "nand", "io4"),
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@ -59,7 +59,7 @@ static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = {
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MPP_MODE(3,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad5"),
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MPP_FUNCTION(0x2, "ptp", "triggen"),
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MPP_FUNCTION(0x2, "ptp", "trig"),
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MPP_FUNCTION(0x3, "led", "p3"),
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MPP_FUNCTION(0x4, "audio", "mclk"),
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MPP_FUNCTION(0x5, "nand", "io5"),
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@ -207,7 +207,7 @@ static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = {
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MPP_FUNCTION(0x2, "ge1", "txd0"),
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MPP_FUNCTION(0x3, "spi1", "cs0"),
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MPP_FUNCTION(0x5, "led", "p3"),
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MPP_FUNCTION(0x6, "ptp", "eventreq")),
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MPP_FUNCTION(0x6, "ptp", "evreq")),
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MPP_MODE(31,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "ge1", "txd1"),
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@ -217,7 +217,7 @@ static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = {
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "ge1", "txd2"),
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MPP_FUNCTION(0x3, "spi1", "sck"),
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MPP_FUNCTION(0x4, "ptp", "triggen"),
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MPP_FUNCTION(0x4, "ptp", "trig"),
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MPP_FUNCTION(0x5, "led", "c0")),
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MPP_MODE(33,
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MPP_FUNCTION(0x0, "gpio", NULL),
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@ -290,7 +290,7 @@ static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = {
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MPP_FUNCTION(0x1, "led", "p1"),
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MPP_FUNCTION(0x2, "ge0", "txd1"),
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MPP_FUNCTION(0x3, "ge1", "txd1"),
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MPP_FUNCTION(0x5, "ptp", "triggen"),
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MPP_FUNCTION(0x5, "ptp", "trig"),
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MPP_FUNCTION(0x6, "dev", "ale0")),
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MPP_MODE(48,
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MPP_FUNCTION(0x0, "gpio", NULL),
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@ -309,7 +309,7 @@ static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = {
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MPP_FUNCTION(0x1, "led", "c0"),
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MPP_FUNCTION(0x2, "ge0", "rxd0"),
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MPP_FUNCTION(0x3, "ge1", "rxd0"),
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MPP_FUNCTION(0x5, "ptp", "eventreq"),
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MPP_FUNCTION(0x5, "ptp", "evreq"),
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MPP_FUNCTION(0x6, "dev", "ad12")),
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MPP_MODE(51,
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MPP_FUNCTION(0x0, "gpio", NULL),
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@ -377,7 +377,7 @@ static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = {
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MPP_FUNCTION(0x6, "dev", "ad15")),
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MPP_MODE(63,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "ptp", "triggen"),
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MPP_FUNCTION(0x2, "ptp", "trig"),
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MPP_FUNCTION(0x4, "led", "p2"),
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MPP_FUNCTION(0x6, "dev", "burst")),
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MPP_MODE(64,
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@ -389,7 +389,7 @@ static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = {
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MPP_FUNCTION(0x1, "sata1", "prsnt")),
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MPP_MODE(66,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "ptp", "eventreq"),
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MPP_FUNCTION(0x2, "ptp", "evreq"),
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MPP_FUNCTION(0x4, "spi1", "cs3"),
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MPP_FUNCTION(0x5, "pcie0", "rstoutn"),
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MPP_FUNCTION(0x6, "dev", "cs3")),
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@ -137,13 +137,13 @@ static struct mvebu_mpp_mode armada_38x_mpp_modes[] = {
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MPP_MODE(18,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "ge0", "rxerr", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(2, "ptp", "trig_gen", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(2, "ptp", "trig", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(3, "ua1", "txd", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(4, "spi0", "cs0", V_88F6810_PLUS)),
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MPP_MODE(19,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "ge0", "col", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(2, "ptp", "event_req", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(2, "ptp", "evreq", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(3, "ge0", "txerr", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(4, "sata1", "prsnt", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(5, "ua0", "cts", V_88F6810_PLUS),
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@ -231,7 +231,7 @@ static struct mvebu_mpp_mode armada_38x_mpp_modes[] = {
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MPP_VAR_FUNCTION(5, "dev", "a1", V_88F6810_PLUS)),
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MPP_MODE(36,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "ptp", "trig_gen", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "ptp", "trig", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(5, "dev", "a0", V_88F6810_PLUS)),
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MPP_MODE(37,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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@ -241,7 +241,7 @@ static struct mvebu_mpp_mode armada_38x_mpp_modes[] = {
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MPP_VAR_FUNCTION(5, "dev", "ad8", V_88F6810_PLUS)),
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MPP_MODE(38,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "ptp", "event_req", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(1, "ptp", "evreq", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(2, "ge1", "rxd1", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(3, "ref", "clk_out0", V_88F6810_PLUS),
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MPP_VAR_FUNCTION(4, "sd0", "d0", V_88F6810_PLUS),
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@ -82,7 +82,7 @@ static struct mvebu_mpp_mode armada_39x_mpp_modes[] = {
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MPP_MODE(10,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
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MPP_VAR_FUNCTION(5, "dev", "ad12", V_88F6920_PLUS),
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MPP_VAR_FUNCTION(7, "ptp", "event", V_88F6920_PLUS)),
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MPP_VAR_FUNCTION(7, "ptp", "evreq", V_88F6920_PLUS)),
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MPP_MODE(11,
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MPP_VAR_FUNCTION(0, "gpio", NULL, V_88F6920_PLUS),
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MPP_VAR_FUNCTION(5, "dev", "ad13", V_88F6920_PLUS),
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